| /arch/hexagon/include/asm/ |
| A D | mmu_context.h | 32 int l1; in switch_mm() local 39 for (l1 = MIN_KERNEL_SEG; l1 <= max_kernel_seg; l1++) in switch_mm() 40 next->pgd[l1] = init_mm.pgd[l1]; in switch_mm()
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| /arch/sparc/kernel/ |
| A D | rtrap_64.S | 62 andn %l1, %o0, %l1 87 and %l1, %l4, %l4 88 andn %l1, %l4, %l1 98 and %l1, %l4, %l4 99 andn %l1, %l4, %l1 118 and %l1, %l4, %l4 119 andn %l1, %l4, %l1 227 andn %l1, TSTATE_SYSCALL, %l1 242 ldx [%l1 + %lo(sparc64_kern_pri_nuc_bits)], %l1 243 or %l0, %l1, %l0 [all …]
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| A D | head_64.S | 170 sub %l0, %l1, %l1 185 sub %l0, %l1, %l1 186 stw %l4, [%l1] 191 sub %l0, %l1, %l1 215 sub %l0, %l1, %l1 236 sub %l0, %l1, %l1 257 sub %l0, %l1, %l1 283 stw %l1, [%l4] 345 sub %l0, %l1, %l1 363 sub %l0, %l1, %l1 [all …]
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| A D | head_32.S | 123 sethi %hi(no_sun4u_here), %l1 379 add %g7, 0x1c, %l1 380 ld [%l1], %l0 411 ldub [%o2], %l1 412 cmp %l1, 'l' 417 ldub [%o2 + 0x4], %l1 419 cmp %l1, 'm' 421 cmp %l1, 's' 423 cmp %l1, 'd' 425 cmp %l1, 'e' [all …]
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| A D | entry.S | 162 jmp %l1 448 mov %l1, %o1 468 mov %l1, %o1 516 mov %l1, %o1 528 cmp %l1, %l5 532 cmp %l1, %l5 555 mov %l1, %o1 572 mov %l1, %o1 589 mov %l1, %o1 606 mov %l1, %o1 [all …]
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| A D | hvtramp.S | 56 mov 0, %l1 70 add %l1, 1, %l1 71 cmp %l1, %l2
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| A D | syscalls.S | 115 ldx [%sp + PTREGS_OFF + PT_V9_G1], %l1 116 call %l1 268 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1 ! pc = npc 276 add %l1, 0x4, %l2 ! npc = npc+4 277 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC] 287 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1 ! pc = npc 299 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]
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| A D | urtt_fill.S | 44 mov %g6, %l1 60 mov %l1, %g6
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| A D | winfixup.S | 57 stx %l1, [%g3 + TI_REG_WINDOW + 0x08] 74 stw %l1, [%g3 + TI_REG_WINDOW + 0x04]
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| /arch/sparc/prom/ |
| A D | cif.S | 20 mov %g5, %l1 25 mov %l1, %g5 43 mov %o0, %l1 47 restore %l1, 0, %o0
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| /arch/sparc/lib/ |
| A D | xor.S | 390 xor %l3, %l1, %l3 431 xor %l1, %i5, %l1 449 xor %l1, %i5, %l1 490 xor %l1, %g3, %l1 503 xor %l1, %g3, %l1 516 xor %l1, %g3, %l1 532 xor %l1, %g3, %l1 576 xor %l1, %g3, %l1 592 xor %l1, %g3, %l1 608 xor %l1, %g3, %l1 [all …]
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| A D | mcount.S | 62 mov %g3, %l1 88 mov %g3, %l1 114 mov %l1, %o2
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| /arch/s390/lib/ |
| A D | string.c | 185 static inline int clcle(const char *s1, unsigned long l1, in clcle() argument 188 union register_pair r1 = { .even = (unsigned long)s1, .odd = l1, }; in clcle() 210 int l1, l2; in strstr() local 215 l1 = __strend(s1) - s1; in strstr() 216 while (l1-- >= l2) { in strstr()
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| /arch/arm/mach-omap1/ |
| A D | irq.c | 137 void __iomem *l1 = irq_banks[0].va; in omap1_handle_irq() local 142 irqnr = readl_relaxed(l1 + IRQ_ITR_REG_OFFSET); in omap1_handle_irq() 143 irqnr &= ~(readl_relaxed(l1 + IRQ_MIR_REG_OFFSET) & 0xffffffff); in omap1_handle_irq() 147 irqnr = readl_relaxed(l1 + IRQ_SIR_FIQ_REG_OFFSET); in omap1_handle_irq() 151 irqnr = readl_relaxed(l1 + IRQ_SIR_IRQ_REG_OFFSET); in omap1_handle_irq()
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| /arch/sparc/power/ |
| A D | hibernate_asm.S | 75 ldxa [%l0 ] %asi, %l1 /* address */ 79 sub %l1, %g7, %l1 84 ldxa [%l1 + %l3] ASI_PHYS_USE_EC, %g2
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| /arch/microblaze/lib/ |
| A D | mulsi3.S | 27 bri l1 30 l1: label
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| /arch/x86/boot/ |
| A D | string.c | 165 size_t l1, l2; in strstr() local 170 l1 = strlen(s1); in strstr() 171 while (l1 >= l2) { in strstr() 172 l1--; in strstr()
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| /arch/sparc/include/asm/ |
| A D | ttable.h | 20 clr %l0; clr %l1; clr %l2; clr %l3; \ 179 add %l1, 4, %l2; \ 253 stx %l1, [%sp + STACK_BIAS + 0x08]; \ 274 stx %l1, [%sp + STACK_BIAS + 0x08]; \ 301 stxa %l1, [%g1 + %g3] ASI; \ 397 stwa %l1, [%sp + %g3] ASI; \ 431 stwa %l1, [%sp + 0x04] %asi; \ 509 ldx [%sp + STACK_BIAS + 0x08], %l1; \ 562 ldxa [%g1 + %g2] ASI, %l1; \ 622 lduwa [%sp + %g2] ASI, %l1; \ [all …]
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| /arch/x86/kernel/cpu/ |
| A D | cacheinfo.c | 155 union l1_cache l1i, l1d, *l1; in legacy_amd_cpuid4() local 166 l1 = &l1d; in legacy_amd_cpuid4() 169 l1 = &l1i; in legacy_amd_cpuid4() 172 if (!l1->val) in legacy_amd_cpuid4() 175 assoc = (l1->assoc == 0xff) ? AMD_CPUID4_FULLY_ASSOCIATIVE : l1->assoc; in legacy_amd_cpuid4() 176 line_size = l1->line_size; in legacy_amd_cpuid4() 177 lines_per_tag = l1->lines_per_tag; in legacy_amd_cpuid4() 178 size_in_kb = l1->size_in_kb; in legacy_amd_cpuid4()
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| A D | intel.c | 555 unsigned int l1, l2; in init_intel() local 557 rdmsr(MSR_IA32_MISC_ENABLE, l1, l2); in init_intel() 558 if (!(l1 & MSR_IA32_MISC_ENABLE_BTS_UNAVAIL)) in init_intel() 560 if (!(l1 & MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL)) in init_intel()
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| /arch/arm64/boot/dts/qcom/ |
| A D | qcs8550-aim300.dtsi | 20 vdd-l1-l4-l10-supply = <&vreg_s6g_1p86>; 148 vdd-l1-supply = <&vreg_s4g_1p25>; 164 vdd-l1-supply = <&vreg_s4e_0p95>; 180 vdd-l1-supply = <&vreg_s4e_0p95>; 224 vdd-l1-supply = <&vreg_s4e_0p95>; 260 vdd-l1-supply = <&vreg_s4g_1p25>;
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| A D | sm8750-mtp.dts | 212 vdd-l1-l4-l10-supply = <&vreg_s3g_1p8>; 404 vdd-l1-supply = <&vreg_s7i_1p2>; 468 vdd-l1-supply = <&vreg_s1d_0p97>; 517 vdd-l1-supply = <&vreg_s1d_0p97>; 583 vdd-l1-supply = <&vreg_s7i_1p2>; 639 vdd-l1-supply = <&vreg_s1d_0p97>; 686 vdd-l1-l2-supply = <&vreg_s7i_1p2>; 752 vdd-l1-l2-supply = <&vreg_s7i_1p2>;
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| A D | sm8550-qrd.dts | 285 vdd-l1-l4-l10-supply = <&vreg_s6g_1p86>; 413 vdd-l1-supply = <&vreg_s4g_1p25>; 429 vdd-l1-supply = <&vreg_s4e_0p95>; 447 vdd-l1-supply = <&vreg_s4e_0p95>; 493 vdd-l1-supply = <&vreg_s4e_0p95>; 531 vdd-l1-supply = <&vreg_s4g_1p25>; 602 vdd-l1-l2-supply = <&vreg_s4g_1p25>; 662 vdd-l1-l2-supply = <&vreg_s4g_1p25>;
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| /arch/sh/boot/compressed/ |
| A D | head_32.S | 70 l1: label 73 bf l1
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| /arch/powerpc/platforms/52xx/ |
| A D | mpc52xx_pic.c | 296 static int mpc52xx_is_extirq(int l1, int l2) in mpc52xx_is_extirq() argument 298 return ((l1 == 0) && (l2 == 0)) || in mpc52xx_is_extirq() 299 ((l1 == 1) && (l2 >= 1) && (l2 <= 3)); in mpc52xx_is_extirq()
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