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Searched refs:loads (Results 1 – 22 of 22) sorted by relevance

/arch/powerpc/perf/
A Dpower9-pmu.c174 GENERIC_EVENT_ATTR(mem-loads, MEM_LOADS);
178 CACHE_EVENT_ATTR(L1-dcache-loads, PM_LD_REF_L1);
182 CACHE_EVENT_ATTR(L1-icache-loads, PM_INST_FROM_L1);
185 CACHE_EVENT_ATTR(LLC-loads, PM_DATA_FROM_L3);
188 CACHE_EVENT_ATTR(branch-loads, PM_BR_CMPL);
A Dpower8-pmu.c134 CACHE_EVENT_ATTR(L1-dcache-loads, PM_LD_REF_L1);
139 CACHE_EVENT_ATTR(L1-icache-loads, PM_INST_FROM_L1);
143 CACHE_EVENT_ATTR(LLC-loads, PM_DATA_FROM_L3);
149 CACHE_EVENT_ATTR(branch-loads, PM_BRU_FIN);
A Dpower10-pmu.c127 GENERIC_EVENT_ATTR(mem-loads, MEM_LOADS);
134 CACHE_EVENT_ATTR(L1-dcache-loads, PM_LD_REF_L1);
138 CACHE_EVENT_ATTR(L1-icache-loads, PM_INST_FROM_L1);
141 CACHE_EVENT_ATTR(LLC-loads, PM_DATA_FROM_L3);
146 CACHE_EVENT_ATTR(branch-loads, PM_BR_CMPL);
/arch/alpha/lib/
A Dev6-copy_user.S64 EXI( ldbu $1,0($17) ) # .. .. .. L : Keep loads separate from stores
116 EXI ( ldbu $2,0($17) ) # .. .. .. L : No loads in the same quad
203 EXI ( ldbu $2,0($17) ) # .. .. .. L : No loads in the same quad
/arch/mips/econet/
A DPlatform2 # we put the load address well above where the bootloader loads and then use
/arch/mips/include/asm/
A Dmips-r2-to-r6-emul.h22 u64 loads; member
A Dfpu_emulator.h26 unsigned long loads; member
/arch/mips/kernel/
A Dmips-r2-to-r6-emul.c1274 MIPS_R2_STATS(loads); in mipsr2_decoder()
1348 MIPS_R2_STATS(loads); in mipsr2_decoder()
1608 MIPS_R2_STATS(loads); in mipsr2_decoder()
1727 MIPS_R2_STATS(loads); in mipsr2_decoder()
2267 (unsigned long)__this_cpu_read(mipsr2emustats.loads), in mipsr2_emul_show()
2268 (unsigned long)__this_cpu_read(mipsr2bdemustats.loads)); in mipsr2_emul_show()
2324 __this_cpu_write((mipsr2emustats).loads, 0); in mipsr2_clear_show()
2325 __this_cpu_write((mipsr2bdemustats).loads, 0); in mipsr2_clear_show()
/arch/powerpc/lib/
A Dmemcpy_64.S115 ld r9,0(r4) # 3+2n loads, 2+2n stores
127 0: ld r0,0(r4) # 4+2n loads, 3+2n stores
/arch/mips/math-emu/
A Dme-debugfs.c55 __this_cpu_write((fpuemustats).loads, 0); in fpuemustats_clear_show()
211 FPU_STAT_CREATE(loads); in debugfs_fpuemu()
A Dcp1emu.c1052 MIPS_FPU_EMU_INC_STATS(loads); in cop1Emulate()
1087 MIPS_FPU_EMU_INC_STATS(loads); in cop1Emulate()
1483 MIPS_FPU_EMU_INC_STATS(loads); in fpux_emu()
1592 MIPS_FPU_EMU_INC_STATS(loads); in fpux_emu()
/arch/arm64/boot/dts/qcom/
A Dsdm660.dtsi34 * platform from hanging on high graphics loads.
/arch/arm/crypto/
A Daes-ce-core.S310 vld1.8 {q0}, [r1] @ overlapping loads
348 vld1.8 {q0}, [r1] @ overlapping loads
/arch/m68k/fpsp040/
A Dx_operr.S222 | Store_max loads the max pos or negative for the size, sets
/arch/x86/events/intel/
A Dcore.c438 EVENT_ATTR_STR(mem-loads, mem_ld_nhm, "event=0x0b,umask=0x10,ldlat=3");
439 EVENT_ATTR_STR(mem-loads, mem_ld_snb, "event=0xcd,umask=0x1,ldlat=3");
2190 EVENT_ATTR_STR(mem-loads, mem_ld_grt, "event=0xd0,umask=0x5,ldlat=3");
5966 EVENT_ATTR_STR(mem-loads, mem_ld_hsw, "event=0xcd,umask=0x1,ldlat=3");
6056 EVENT_ATTR_STR(mem-loads-aux, mem_ld_aux, "event=0x03,umask=0x82");
6441 EVENT_ATTR_STR_HYBRID(mem-loads, mem_ld_adl, "event=0xd0,umask=0x5,ldlat=3;event=0xcd,umask…
6443 EVENT_ATTR_STR_HYBRID(mem-loads-aux, mem_ld_aux_adl, "event=0x03,umask=0x82", …
6458 EVENT_ATTR_STR_HYBRID(mem-loads,
/arch/arm/boot/dts/amlogic/
A Dmeson8.dtsi184 * code which is responsible for system suspend. It loads a
/arch/riscv/
A DKconfig925 scalar or vector loads and stores.
932 Embed support for emulating misaligned loads and stores.
939 Enable detecting support for vector misaligned loads and stores.
/arch/sh/
A DKconfig710 first part of the romImage which in turn loads the rest the kernel
/arch/arm64/
A DKconfig579 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
586 instructions to Write-Back memory are mixed with Device loads.
588 The workaround is to promote device loads to use Load-Acquire
1804 bool "Fix up misaligned multi-word loads and stores in user space"
/arch/arm/boot/dts/samsung/
A Dexynos4212-tab3.dtsi45 /* Default S-BOOT bootloader loads initramfs here */
/arch/x86/
A DKconfig2129 If bootloader loads the kernel at a non-aligned address and
2133 If bootloader loads the kernel at a non-aligned address and
/arch/arm/
A DKconfig811 and Device/Strongly-Ordered loads and stores might cause deadlock

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