| /arch/csky/abiv2/inc/abi/ |
| A D | entry.h | 28 RD_MEH lr
29 WR_MEH lr
33 add lr, tls
59 mfhi lr
61 mflo lr
129 mfhi lr
131 mflo lr
176 mfhi lr
178 mflo lr
188 mthi lr
[all …]
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| /arch/arm/mm/ |
| A D | cache-nop.S | 14 ret lr
18 ret lr
22 ret lr
26 ret lr
30 ret lr
35 ret lr
39 ret lr
43 ret lr
47 ret lr
51 ret lr
|
| A D | cache-v4.S | 20 ret lr
42 ret lr
44 ret lr
62 ret lr
64 ret lr
79 ret lr
94 ret lr
125 ret lr
137 ret lr
147 ret lr
|
| A D | proc-v7m.S | 18 ret lr
22 ret lr
48 ret lr
52 ret lr
59 ret lr
67 ret lr
71 ret lr
85 ret lr
94 ret lr
134 mov r6, lr @ save LR
[all …]
|
| A D | proc-arm9tdmi.S | 29 ret lr
33 ret lr
37 ret lr
41 ret lr
48 ret lr
64 ret lr
|
| /arch/csky/kernel/ |
| A D | perf_callchain.c | 10 unsigned long lr; member
26 if (__kernel_text_address(frame->lr)) { in unwind_frame_kernel()
29 frame->lr = ftrace_graph_ret_addr(NULL, &graph, frame->lr, in unwind_frame_kernel()
39 perf_callchain_store(entry, fr->lr); in walk_stackframe()
51 unsigned long lr = 0; in user_backtrace() local
62 lr = reg_lr; in user_backtrace()
64 lr = buftail.lr; in user_backtrace()
67 perf_callchain_store(entry, lr); in user_backtrace()
100 fp = user_backtrace(entry, fp, regs->lr); in perf_callchain_user()
112 fr.lr = regs->lr; in perf_callchain_kernel()
|
| /arch/arm/kernel/ |
| A D | entry-ftrace.S | 58 badr lr, 2f
79 push {r0-r11, ip, lr}
92 ldr lr, [sp, #S_PC] @ get LR
195 stmdb sp!, {r0-r3, lr}
196 UNWIND(.save {r0-r3, lr})
205 ldr lr, [sp, #4]
212 push {lr}
213 ldr lr, [sp, #4]
265 ret lr
271 ret lr
[all …]
|
| /arch/arm/lib/ |
| A D | memset.S | 40 UNWIND( .save {r8, lr} )
41 stmfd sp!, {r8, lr}
43 mov lr, r3
47 stmiage ip!, {r1, r3, r8, lr}
48 stmiage ip!, {r1, r3, r8, lr}
49 stmiage ip!, {r1, r3, r8, lr}
60 ldmfd sp!, {r8, lr}
72 stmfd sp!, {r4-r8, lr}
78 mov lr, r3
104 ldmfd sp!, {r4-r8, lr}
[all …]
|
| A D | delay-loop.S | 40 reteq lr
50 retls lr
52 retls lr
54 retls lr
56 retls lr
58 retls lr
60 retls lr
62 retls lr
66 ret lr
|
| A D | copy_page.S | 25 stmfd sp!, {r4, lr} @ 2
29 ldmia r1!, {r3, r4, ip, lr} @ 4+1
34 stmia r0!, {r3, r4, ip, lr} @ 4
35 ldmia r1!, {r3, r4, ip, lr} @ 4
38 stmia r0!, {r3, r4, ip, lr} @ 4
39 ldmiagt r1!, {r3, r4, ip, lr} @ 4
41 PLD( ldmiaeq r1!, {r3, r4, ip, lr} )
|
| A D | io-writesl.S | 12 reteq lr
18 stmfd sp!, {r4, lr}
19 1: ldmia r1!, {r3, r4, ip, lr}
24 str lr, [r0, #0]
26 ldmfd sp!, {r4, lr}
33 ret lr
47 ret lr
55 ret lr
63 ret lr
|
| A D | memmove.S | 37 UNWIND( .save {r0, r4, fpreg, lr} )
38 stmfd sp!, {r0, r4, UNWIND(fpreg,) lr}
89 W(ldr) lr, [r1, #-4]!
100 W(str) lr, [r0, #-4]!
118 ldrb lr, [r1, #-1]!
122 strb lr, [r0, #-1]!
155 mov lr, r3, lspush #\push
158 orr lr, lr, ip, lspull #\pull
183 15: mov lr, r3, lspush #\push
186 orr lr, lr, r3, lspull #\pull
[all …]
|
| A D | io-writesb.S | 20 mov lr, \rd, lsr #24
21 strb lr, [r0]
22 mov lr, \rd, lsr #16
23 strb lr, [r0]
24 mov lr, \rd, lsr #8
25 strb lr, [r0]
45 reteq lr
50 stmfd sp!, {r4, r5, lr}
|
| A D | csumpartialcopyuser.S | 20 stmfd sp!, {r1, r2, r4 - r8, ip, lr}
25 ldmfd sp!, {r1, r2, r4 - r8, ip, lr}
27 ret lr
34 stmfd sp!, {r1, r2, r4 - r8, ip, lr}
39 ldmfd sp!, {r1, r2, r4 - r8, ip, lr}
41 ret lr
47 stmfd sp!, {r1, r2, r4 - r8, lr}
|
| A D | getuser.S | 36 ret lr
66 ret lr
74 ret lr
88 ret lr
102 ret lr
110 ret lr
127 ret lr
135 ret lr
145 ret lr
|
| A D | io-readsl.S | 12 reteq lr
18 stmfd sp!, {r4, lr}
22 ldr lr, [r0, #0]
24 stmia r1!, {r3, r4, ip, lr}
26 ldmfd sp!, {r4, lr}
33 ret lr
75 ret lr
|
| A D | lib1funcs.S | 227 ret lr
231 ret lr
236 ret lr
255 ret lr
285 ret lr
289 ret lr
294 ret lr
301 ret lr
326 ret lr
342 ret lr
[all …]
|
| /arch/arm64/kvm/vgic/ |
| A D | vgic-v3-nested.c | 137 return !(lr & (ICH_LR_STATE | ICH_LR_HW)) && (lr & ICH_LR_EOI); in lr_triggers_eoi()
148 if (lr_triggers_eoi(lr)) in vgic_compute_mi_state()
150 if (!(lr & ICH_LR_STATE)) in vgic_compute_mi_state()
221 if (!(lr & ICH_LR_HW)) in translate_lr_pintid()
222 return lr; in translate_lr_pintid()
228 lr &= ~ICH_LR_HW; in translate_lr_pintid()
237 return lr; in translate_lr_pintid()
256 if (!(lr & ICH_LR_STATE)) in vgic_v3_create_shadow_lr()
259 lr = translate_lr_pintid(vcpu, lr); in vgic_v3_create_shadow_lr()
277 if (!(lr & ICH_LR_HW) || !(lr & ICH_LR_STATE)) in vgic_v3_sync_nested()
[all …]
|
| /arch/arm/mach-mvebu/ |
| A D | coherency_ll.S | 50 ret lr
67 ret lr
87 mov r0, lr
93 mov lr, r0
101 ret lr
112 mov r0, lr
118 mov lr, r0
128 ret lr
139 mov r0, lr
145 mov lr, r0
[all …]
|
| /arch/arm/nwfpe/ |
| A D | entry.S | 139 reteq lr
152 ret lr @ CP#0
155 ret lr @ CP#3
156 ret lr @ CP#4
157 ret lr @ CP#5
158 ret lr @ CP#6
159 ret lr @ CP#7
160 ret lr @ CP#8
161 ret lr @ CP#9
164 ret lr @ CP#12
[all …]
|
| /arch/arm/boot/compressed/ |
| A D | ll_char_wr.S | 33 stmfd sp!, {r4 - r7, lr}
35 @ Smashable regs: {r0 - r3}, [r4 - r7], (r8 - fp), [ip], (sp), [lr], (pc)
45 ldmia ip, {r3, r4, r5, r6, lr}
48 add lr, lr, ip
62 @ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)
65 ldr r7, [lr, r7, lsl #2]
70 ldr r7, [lr, r7, lsl #2]
84 ldr ip, [lr, ip, lsl #2]
87 ldr ip, [lr, ip, lsl #2] @ avoid r4
94 ldr ip, [lr, ip, lsl #2]
[all …]
|
| /arch/arm/vfp/ |
| A D | vfphw.S | 48 ret lr
66 ret lr
86 ret lr
91 ret lr
101 ret lr
106 ret lr
116 ret lr
124 ret lr
132 ret lr
140 ret lr
[all …]
|
| /arch/csky/abiv1/inc/abi/ |
| A D | entry.h | 42 stw lr, (sp, 4)
44 mfcr lr, epc
46 add lr, r13
47 stw lr, (sp, 8)
49 mov lr, sp
50 addi lr, 32
51 addi lr, 32
52 addi lr, 16
54 mfcr lr, ss1
56 stw lr, (sp, 16)
[all …]
|
| /arch/arm/mach-tegra/ |
| A D | reset-handler.S | 100 reteq lr
199 ldr lr, [r12, #RESET_DATA(STARTUP_LP1)]
200 cmp lr, #0
202 THUMB( add lr, lr, #1 ) @ switch to Thumb mode
203 bx lr
211 cmp lr, #0
213 bx lr
228 cmp lr, #0
230 bx lr
239 sub lr, lr, #4
[all …]
|
| /arch/csky/abiv2/ |
| A D | mcount.S | 33 stw lr, (sp, 16)
44 ldw lr, (sp, 24)
51 stw lr, (sp, 0)
62 ldw lr, (sp, 8)
76 mov lr, a0
91 jmp lr
105 mov a0, lr
135 mov t1, lr
136 ldw lr, (sp, 0)
181 jmp lr
|