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Searched refs:mc (Results 1 – 25 of 120) sorted by relevance

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/arch/x86/kernel/cpu/microcode/
A Dintel.c254 if (mc) in save_microcode_patch()
308 if (!mc) in __apply_microcode()
335 struct microcode_intel *mc = uci->mc; in apply_microcode_early() local
396 if (uci.mc) in save_builtin_microcode()
421 if (uci.mc) in load_ucode_intel_ap()
430 if (uci.mc) in reload_ucode_intel()
518 kvfree(mc); in parse_microcode_blobs()
520 if (!mc) in parse_microcode_blobs()
545 mc = NULL; in parse_microcode_blobs()
551 kvfree(mc); in parse_microcode_blobs()
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A Damd.c128 struct microcode_amd *mc; member
551 desc->mc = mc; in parse_container()
568 if (desc->mc) { in parse_container()
679 struct microcode_amd *mc; in load_ucode_amd_bsp() local
705 mc = desc.mc; in load_ucode_amd_bsp()
706 if (!mc) in load_ucode_amd_bsp()
843 mc = p->data; in reload_ucode_amd()
866 uci->mc = p->data; in collect_cpu_info_amd()
891 uci->mc = p->data; in apply_microcode_amd()
1113 if (!desc.mc) in save_microcode_in_initrd()
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/arch/x86/um/shared/sysdep/
A Dmcontext.h12 extern void get_mc_from_regs(struct uml_pt_regs *regs, mcontext_t *mc,
22 #define GET_FAULTINFO_FROM_MC(fi, mc) \ argument
24 (fi).cr2 = (mc)->cr2; \
25 (fi).error_code = (mc)->gregs[REG_ERR]; \
26 (fi).trap_no = (mc)->gregs[REG_TRAPNO]; \
31 #define GET_FAULTINFO_FROM_MC(fi, mc) \ argument
33 (fi).cr2 = (mc)->gregs[REG_CR2]; \
34 (fi).error_code = (mc)->gregs[REG_ERR]; \
35 (fi).trap_no = (mc)->gregs[REG_TRAPNO]; \
/arch/powerpc/platforms/powernv/
A Dopal-msglog.c41 if (!mc) in memcons_copy()
44 out_pos = be32_to_cpu(READ_ONCE(mc->out_pos)); in memcons_copy()
58 avail = be32_to_cpu(mc->obuf_size) - out_pos; in memcons_copy()
76 if (out_pos > be32_to_cpu(mc->obuf_size)) { in memcons_copy()
111 struct memcons *mc; in memcons_init() local
119 mc = phys_to_virt(mcaddr); in memcons_init()
120 if (!mc) { in memcons_init()
125 if (be64_to_cpu(mc->magic) != MEMCONS_MAGIC) { in memcons_init()
130 return mc; in memcons_init()
136 u32 __init memcons_get_size(struct memcons *mc) in memcons_get_size() argument
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A Dpowernv.h41 ssize_t memcons_copy(struct memcons *mc, char *to, loff_t pos, size_t count);
42 u32 __init memcons_get_size(struct memcons *mc);
/arch/x86/um/os-Linux/
A Dmcontext.c12 void get_regs_from_mc(struct uml_pt_regs *regs, mcontext_t *mc) in get_regs_from_mc() argument
15 #define COPY2(X,Y) regs->gp[X] = mc->gregs[REG_##Y] in get_regs_from_mc()
16 #define COPY(X) regs->gp[X] = mc->gregs[REG_##X] in get_regs_from_mc()
46 mcontext_t *mc = _mc; in mc_set_rip() local
49 mc->gregs[REG_EIP] = (unsigned long)target; in mc_set_rip()
51 mc->gregs[REG_RIP] = (unsigned long)target; in mc_set_rip()
59 #define COPY2(X,Y) mc->gregs[REG_##Y] = regs->gp[X] in get_mc_from_regs()
60 #define COPY(X) mc->gregs[REG_##X] = regs->gp[X] in get_mc_from_regs()
77 mc->gregs[REG_CSGSFS] = mc->gregs[REG_CSGSFS] & 0xffffffffffffl; in get_mc_from_regs()
82 mc->gregs[REG_EFL] |= X86_EFLAGS_TF; in get_mc_from_regs()
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/arch/um/os-Linux/
A Dsignal.c43 get_regs_from_mc(&r, mc); in sig_handler_common()
44 GET_FAULTINFO_FROM_MC(r.faultinfo, mc); in sig_handler_common()
51 (*sig_info[sig])(sig, si, &r, mc); in sig_handler_common()
78 static void sig_handler(int sig, struct siginfo *si, mcontext_t *mc) in sig_handler() argument
116 sig_handler_common(sig, si, mc); in sig_handler()
121 static void timer_real_alarm_handler(mcontext_t *mc) in timer_real_alarm_handler() argument
125 if (mc != NULL) in timer_real_alarm_handler()
126 get_regs_from_mc(&regs, mc); in timer_real_alarm_handler()
146 timer_real_alarm_handler(mc); in timer_alarm_handler()
203 mcontext_t *mc = &uc->uc_mcontext; in hard_handler() local
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/arch/x86/xen/
A Dmulticalls.c145 struct multicall_entry *mc; in xen_mc_flush() local
174 mc = &b->entries[0]; in xen_mc_flush()
176 mc->result = xen_single_call(mc->op, mc->args[0], mc->args[1], in xen_mc_flush()
177 mc->args[2], mc->args[3], in xen_mc_flush()
178 mc->args[4]); in xen_mc_flush()
179 ret = mc->result < 0; in xen_mc_flush()
238 ret.mc = &b->entries[b->mcidx]; in __xen_mc_entry()
273 ret.mc = &b->entries[b->mcidx - 1]; in xen_mc_extend_args()
/arch/um/include/shared/
A Dkern_util.h28 void *mc);
32 void *mc);
65 void *mc);
67 void *mc);
A Dirq_user.h19 struct uml_pt_regs *regs, void *mc);
21 struct uml_pt_regs *regs, void *mc);
/arch/arm/boot/dts/nvidia/
A Dtegra30.dtsi4 #include <dt-bindings/memory/tegra30-mc.h>
127 reset-names = "host1x", "mc";
128 iommus = <&mc TEGRA_SWGROUP_HC>;
202 reset-names = "2d", "mc";
217 <&mc TEGRA30_MC_RESET_3D>,
218 <&mc TEGRA30_MC_RESET_3D2>;
225 <&mc TEGRA_SWGROUP_NV2>;
532 reset-names = "vde", "mc";
858 <&mc TEGRA30_MC_RESET_HC>,
903 <&mc TEGRA30_MC_RESET_VI>,
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A Dtegra20.dtsi4 #include <dt-bindings/memory/tegra20-mc.h>
44 reset-names = "host1x", "mc";
106 reset-names = "2d", "mc";
116 reset-names = "3d", "mc";
136 <&mc TEGRA20_MC_DISPLAY0B &emc>,
353 reset-names = "vde", "mc";
707 <&mc TEGRA20_MC_RESET_MPEB>,
708 <&mc TEGRA20_MC_RESET_MPEC>,
735 <&mc TEGRA20_MC_RESET_VI>,
745 mc: memory-controller@7000f000 { label
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A Dtegra114.dtsi4 #include <dt-bindings/memory/tegra114-mc.h>
42 reset-names = "host1x", "mc";
43 iommus = <&mc TEGRA_SWGROUP_HC>;
56 reset-names = "2d", "mc";
58 iommus = <&mc TEGRA_SWGROUP_G2>;
66 reset-names = "3d", "mc";
68 iommus = <&mc TEGRA_SWGROUP_NV>;
81 iommus = <&mc TEGRA_SWGROUP_DC>;
100 iommus = <&mc TEGRA_SWGROUP_DCB>;
286 reset-names = "vde", "mc";
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A Dtegra124.dtsi4 #include <dt-bindings/memory/tegra124-mc.h>
98 reset-names = "host1x", "mc";
99 iommus = <&mc TEGRA_SWGROUP_HC>;
115 iommus = <&mc TEGRA_SWGROUP_DC>;
123 <&mc TEGRA124_MC_DISPLAYD &emc>,
124 <&mc TEGRA124_MC_DISPLAYT &emc>;
142 iommus = <&mc TEGRA_SWGROUP_DCB>;
193 iommus = <&mc TEGRA_SWGROUP_VIC>;
271 iommus = <&mc TEGRA_SWGROUP_GPU>;
680 mc: memory-controller@70019000 { label
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/arch/um/kernel/
A Dtrap.c290 void *mc) in segv_handler() argument
299 segv(*fi, UPT_IP(regs), UPT_IS_USER(regs), regs, mc); in segv_handler()
309 struct uml_pt_regs *regs, void *mc) in segv() argument
333 if (!mc) { in segv()
341 mc_set_rip(mc, current->thread.segv_continue); in segv()
398 void *mc) in relay_signal() argument
427 void *mc) in winch() argument
/arch/arm64/crypto/
A Daes-ce.S52 .macro do_enc_Nx, de, mc, k, i0, i1, i2, i3, i4
54 aes\mc \i0\().16b, \i0\().16b
57 aes\mc \i1\().16b, \i1\().16b
60 aes\mc \i2\().16b, \i2\().16b
62 aes\mc \i3\().16b, \i3\().16b
65 aes\mc \i4\().16b, \i4\().16b
74 do_enc_Nx e, mc, \k, \i0, \i1, \i2, \i3, \i4
/arch/arm64/boot/dts/nvidia/
A Dtegra194.dtsi11 #include <dt-bindings/memory/tegra194-mc.h>
157 <&mc TEGRA194_MEMORY_CLIENT_EQOSW &emc>;
663 mc: memory-controller@2c00000 { label
664 compatible = "nvidia,tegra194-mc";
1078 <&mc TEGRA194_MEMORY_CLIENT_SDMMCW &emc>;
1153 <&mc TEGRA194_MEMORY_CLIENT_HDAW &emc>;
1809 nvidia,memory-controller = <&mc>;
1887 nvidia,memory-controller = <&mc>;
2814 <&mc TEGRA194_MEMORY_CLIENT_NVL1W &emc>,
2815 <&mc TEGRA194_MEMORY_CLIENT_NVL2R &emc>,
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A Dtegra186.dtsi6 #include <dt-bindings/memory/tegra186-mc.h>
64 <&mc TEGRA186_MEMORY_CLIENT_EQOSW &emc>;
555 mc: memory-controller@2c00000 { label
556 compatible = "nvidia,tegra186-mc";
860 <&mc TEGRA186_MEMORY_CLIENT_SDMMCWA &emc>;
915 <&mc TEGRA186_MEMORY_CLIENT_SDMMCW &emc>;
971 <&mc TEGRA186_MEMORY_CLIENT_SATAW &emc>;
1004 <&mc TEGRA186_MEMORY_CLIENT_HDAW &emc>;
1379 <&mc TEGRA186_MEMORY_CLIENT_AFIW &emc>;
1500 nvidia,memory-controller = <&mc>;
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A Dtegra234.dtsi7 #include <dt-bindings/memory/tegra234-mc.h>
2707 mc: memory-controller@2c00000 { label
2708 compatible = "nvidia,tegra234-mc";
3135 <&mc TEGRA234_MEMORY_CLIENT_HDAW &emc>;
3832 nvidia,memory-controller = <&mc>;
4183 nvidia,memory-controller = <&mc>;
4325 nvidia,memory-controller = <&mc>;
4416 nvidia,memory-controller = <&mc>;
4698 <&mc TEGRA234_MEMORY_CLIENT_PCIE1W &emc>;
4806 <&mc TEGRA234_MEMORY_CLIENT_PCIE3W &emc>;
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/arch/x86/include/asm/
A Dcpu.h65 bool intel_find_matching_signature(void *mc, struct cpu_signature *sig);
66 int intel_microcode_sanity_check(void *mc, bool print_err, int hdr_type);
/arch/arm64/include/asm/
A Dkvm_pkvm.h184 enum kvm_pgtable_prot prot, void *mc,
195 struct kvm_mmu_memory_cache *mc);
198 enum kvm_pgtable_prot prot, void *mc,
A Dkvm_host.h100 *p = mc->head; in push_hyp_memcache()
101 mc->head = to_pa(p); in push_hyp_memcache()
102 mc->nr_pages++; in push_hyp_memcache()
108 phys_addr_t *p = to_va(mc->head & PAGE_MASK); in pop_hyp_memcache()
110 if (!mc->nr_pages) in pop_hyp_memcache()
113 mc->head = *p; in pop_hyp_memcache()
114 mc->nr_pages--; in pop_hyp_memcache()
125 while (mc->nr_pages < min_pages) { in __topup_hyp_memcache()
130 push_hyp_memcache(mc, p, to_pa); in __topup_hyp_memcache()
141 while (mc->nr_pages) in __free_hyp_memcache()
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/arch/arm64/kvm/hyp/include/nvhe/
A Dmem_protect.h59 void reclaim_pgtable_pages(struct pkvm_hyp_vm *vm, struct kvm_hyp_memcache *mc);
60 int refill_memcache(struct kvm_hyp_memcache *mc, unsigned long min_pages,
/arch/arm64/boot/dts/freescale/
A Dfsl-ls208xa.dtsi757 fsl_mc: fsl-mc@80c000000 {
758 compatible = "fsl,qoriq-mc";
782 compatible = "fsl,qoriq-mc-dpmac";
788 compatible = "fsl,qoriq-mc-dpmac";
794 compatible = "fsl,qoriq-mc-dpmac";
800 compatible = "fsl,qoriq-mc-dpmac";
806 compatible = "fsl,qoriq-mc-dpmac";
812 compatible = "fsl,qoriq-mc-dpmac";
818 compatible = "fsl,qoriq-mc-dpmac";
824 compatible = "fsl,qoriq-mc-dpmac";
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/arch/arm64/kvm/hyp/
A Dpgtable.c1041 .memcache = mc, in kvm_pgtable_stage2_map()
1065 void *mc, u8 owner_id) in kvm_pgtable_stage2_set_owner() argument
1070 .memcache = mc, in kvm_pgtable_stage2_set_owner()
1347 void *mc, bool force_pte) in kvm_pgtable_stage2_create_unlinked() argument
1352 .memcache = mc, in kvm_pgtable_stage2_create_unlinked()
1383 pgtable = mm_ops->zalloc_page(mc); in kvm_pgtable_stage2_create_unlinked()
1443 if (mc->nobjs >= nr_pages) { in stage2_split_walker()
1459 if (mc->nobjs < nr_pages) in stage2_split_walker()
1467 level, prot, mc, force_pte); in stage2_split_walker()
1487 struct kvm_mmu_memory_cache *mc) in kvm_pgtable_stage2_split() argument
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