| /arch/x86/boot/ |
| A D | video-mode.c | 52 int mode_defined(u16 mode) in mode_defined() argument 61 if (mi->mode == mode) in mode_defined() 77 mode &= ~VIDEO_RECALC; in raw_set_mode() 87 mode == mi->mode || in raw_set_mode() 89 *real_mode = mi->mode; in raw_set_mode() 103 *real_mode = mix.mode = mode; in raw_set_mode() 145 int set_mode(u16 mode) in set_mode() argument 153 else if (mode == NORMAL_VGA) in set_mode() 154 mode = VIDEO_80x25; in set_mode() 156 mode = VIDEO_8POINT; in set_mode() [all …]
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| A D | video-bios.c | 22 static int set_bios_mode(u8 mode); 26 return set_bios_mode(mi->mode - VIDEO_FIRST_BIOS); in bios_set_mode() 29 static int set_bios_mode(u8 mode) in set_bios_mode() argument 35 ireg.al = mode; /* AH=0x00 Set Video Mode */ in set_bios_mode() 46 if (new_mode == mode) in set_bios_mode() 63 u8 mode; in bios_probe() local 81 for (mode = 0x14; mode <= 0x7f; mode++) { in bios_probe() 85 if (mode_defined(VIDEO_FIRST_BIOS+mode)) in bios_probe() 88 if (set_bios_mode(mode)) in bios_probe() 106 mi->mode = VIDEO_FIRST_BIOS+mode; in bios_probe()
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| A D | video-vga.c | 42 u8 mode; in vga_set_basic_mode() local 49 mode = oreg.al; in vga_set_basic_mode() 51 if (mode != 3 && mode != 7) in vga_set_basic_mode() 52 mode = 3; in vga_set_basic_mode() 55 ireg.ax = mode; /* AH=0: set mode */ in vga_set_basic_mode() 58 return mode; in vga_set_basic_mode() 191 static int vga_set_mode(struct mode_info *mode) in vga_set_mode() argument 197 force_x = mode->x; in vga_set_mode() 198 force_y = mode->y; in vga_set_mode() 200 switch (mode->mode) { in vga_set_mode()
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| A D | video-vesa.c | 34 u16 mode; in vesa_probe() local 54 while ((mode = rdfs16(mode_ptr)) != 0xffff) { in vesa_probe() 60 if (mode & ~0x1ff) in vesa_probe() 66 ireg.cx = mode; in vesa_probe() 77 mi->mode = mode + VIDEO_FIRST_VESA; in vesa_probe() 92 mi->mode = mode + VIDEO_FIRST_VESA; in vesa_probe() 104 static int vesa_set_mode(struct mode_info *mode) in vesa_set_mode() argument 108 u16 vesa_mode = mode->mode - VIDEO_FIRST_VESA; in vesa_set_mode() 146 force_x = mode->x; in vesa_set_mode() 147 force_y = mode->y; in vesa_set_mode()
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| /arch/mips/include/asm/octeon/ |
| A D | cvmx-spi.h | 49 int (*reset_cb) (int interface, cvmx_spi_mode_t mode); 52 int (*calendar_setup_cb) (int interface, cvmx_spi_mode_t mode, 56 int (*clock_detect_cb) (int interface, cvmx_spi_mode_t mode, 60 int (*training_cb) (int interface, cvmx_spi_mode_t mode, int timeout); 63 int (*calendar_sync_cb) (int interface, cvmx_spi_mode_t mode, 67 int (*interface_up_cb) (int interface, cvmx_spi_mode_t mode); 97 extern int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode, 113 extern int cvmx_spi_restart_interface(int interface, cvmx_spi_mode_t mode, 183 extern int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode); 217 extern int cvmx_spi_clock_detect_cb(int interface, cvmx_spi_mode_t mode, [all …]
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| /arch/s390/boot/ |
| A D | vmem.c | 269 enum populate_mode mode) in resolve_pa_may_alloc() argument 271 switch (mode) { in resolve_pa_may_alloc() 301 switch (mode) { in large_page_mapping_allowed() 315 enum populate_mode mode) in try_get_large_pud_pa() argument 331 enum populate_mode mode) in try_get_large_pmd_pa() argument 347 enum populate_mode mode) in pgtable_pte_populate() argument 363 if (mode == POPULATE_IDENTITY) in pgtable_pte_populate() 368 enum populate_mode mode) in pgtable_pmd_populate() argument 395 if (mode == POPULATE_IDENTITY) in pgtable_pmd_populate() 400 enum populate_mode mode) in pgtable_pud_populate() argument [all …]
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| /arch/arm64/boot/dts/qcom/ |
| A D | sm6350-sony-xperia-lena-pdx213.dts | 65 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 71 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 77 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 83 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 89 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 95 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 101 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 107 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 113 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 119 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; [all …]
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| A D | sm8550-samsung-q5q.dts | 117 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 124 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 131 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 138 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 145 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 152 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 159 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 166 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 173 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 180 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; [all …]
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| A D | qcs8550-aim300.dtsi | 35 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 42 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 49 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 56 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 63 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 70 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 77 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 84 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 91 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 98 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; [all …]
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| A D | sm8250-hdk.dts | 94 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 101 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 108 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 115 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 122 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 129 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 136 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 143 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 150 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 377 mode-bootloader = <0x2>; [all …]
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| A D | sm8150-mtp.dts | 91 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 99 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 105 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 132 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 138 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 144 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 151 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 157 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 163 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 362 mode-bootloader = <0x2>; [all …]
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| A D | sm7125-xiaomi-common.dtsi | 136 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 142 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 148 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 154 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 163 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 169 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 175 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 181 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 187 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 193 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; [all …]
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| A D | sm8150-microsoft-surface-duo.dts | 100 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 108 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 114 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 141 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 147 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 153 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 160 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 379 dlg,const-op-mode = <1>; 380 dlg,periodic-op-mode = <1>; 434 mode-bootloader = <0x2>; [all …]
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| A D | sm8150-hdk.dts | 108 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 116 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 122 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 147 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 153 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 159 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 402 mode-switch; 479 qcom,dual-dsi-mode; 500 qcom,dual-dsi-mode; 583 mode-bootloader = <0x2>; [all …]
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| A D | sm8550-mtp.dts | 223 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 230 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 237 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 244 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 251 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 258 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 265 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 272 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 279 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 286 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; [all …]
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| /arch/arm/mach-tegra/ |
| A D | pm.c | 194 tegra_pmc_enter_suspend_mode(mode); in tegra_pm_set() 225 enum tegra_suspend_mode mode) in tegra_pm_validate_suspend_mode() argument 230 if (mode > TEGRA_SUSPEND_LP1) in tegra_pm_validate_suspend_mode() 233 return mode; in tegra_pm_validate_suspend_mode() 356 tegra_pm_set(mode); in tegra_suspend_enter() 361 switch (mode) { in tegra_suspend_enter() 382 switch (mode) { in tegra_suspend_enter() 410 if (mode == TEGRA_SUSPEND_NONE) in tegra_pm_init_suspend() 415 if (mode >= TEGRA_SUSPEND_LP1) { in tegra_pm_init_suspend() 421 mode = TEGRA_SUSPEND_LP2; in tegra_pm_init_suspend() [all …]
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| /arch/arm64/boot/dts/microchip/ |
| A D | sparx5_pcb135_board.dtsi | 369 phy-mode = "qsgmii"; 376 phy-mode = "qsgmii"; 383 phy-mode = "qsgmii"; 390 phy-mode = "qsgmii"; 397 phy-mode = "qsgmii"; 404 phy-mode = "qsgmii"; 411 phy-mode = "qsgmii"; 418 phy-mode = "qsgmii"; 425 phy-mode = "qsgmii"; 432 phy-mode = "qsgmii"; [all …]
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| /arch/arm/mach-omap1/ |
| A D | mux.h | 27 #define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \ argument 30 .mask = mode, 44 .mask = mode, 53 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \ argument 55 .mask = mode, 64 #define MUX_REG_7XX(reg, mode_offset, mode) \ argument 67 .mask = mode, 75 #define MUX_CFG(desc, mux_reg, mode_offset, mode, \ argument 81 MUX_REG(mux_reg, mode_offset, mode) \ 94 #define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \ argument [all …]
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| /arch/arm/boot/dts/microchip/ |
| A D | lan966x-pcb8290.dts | 63 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 70 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 77 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 119 phy-mode = "qsgmii"; 127 phy-mode = "qsgmii"; 135 phy-mode = "qsgmii"; 143 phy-mode = "qsgmii"; 151 phy-mode = "qsgmii"; 159 phy-mode = "qsgmii"; 167 phy-mode = "qsgmii"; [all …]
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| /arch/mips/cavium-octeon/executive/ |
| A D | cvmx-interrupt-rsl.c | 78 union cvmx_gmxx_inf_mode mode; in __cvmx_interrupt_gmxx_enable() local 83 mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface)); in __cvmx_interrupt_gmxx_enable() 86 if (mode.s.en) { in __cvmx_interrupt_gmxx_enable() 87 switch (mode.cn52xx.mode) { in __cvmx_interrupt_gmxx_enable() 102 if (mode.s.en) { in __cvmx_interrupt_gmxx_enable() 110 if (mode.s.type) in __cvmx_interrupt_gmxx_enable() 120 if (mode.s.type) in __cvmx_interrupt_gmxx_enable()
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| A D | cvmx-spi.c | 114 INVOKE_CB(cvmx_spi_callbacks.reset_cb, interface, mode); in cvmx_spi_start_interface() 127 INVOKE_CB(cvmx_spi_callbacks.calendar_sync_cb, interface, mode, in cvmx_spi_start_interface() 157 cvmx_dprintf("SPI%d: Restart %s\n", interface, modes[mode]); in cvmx_spi_restart_interface() 160 INVOKE_CB(cvmx_spi_callbacks.reset_cb, interface, mode); in cvmx_spi_restart_interface() 195 int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode) in cvmx_spi_reset_cb() argument 316 if (mode & CVMX_SPI_MODE_RX_HALFPLEX) { in cvmx_spi_calendar_setup_cb() 350 if (mode & CVMX_SPI_MODE_TX_HALFPLEX) { in cvmx_spi_calendar_setup_cb() 580 if (mode & CVMX_SPI_MODE_RX_HALFPLEX) { in cvmx_spi_calendar_sync_cb() 592 if (mode & CVMX_SPI_MODE_TX_HALFPLEX) { in cvmx_spi_calendar_sync_cb() 639 if (mode & CVMX_SPI_MODE_RX_HALFPLEX) { in cvmx_spi_interface_up_cb() [all …]
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| /arch/arm/boot/dts/marvell/ |
| A D | kirkwood-net5big.dts | 91 mode-addr = <5>; 92 mode-val = <NETXBIG_LED_OFF 0 101 mode-addr = <5>; 102 mode-val = <NETXBIG_LED_OFF 0 110 mode-addr = <6>; 111 mode-val = <NETXBIG_LED_OFF 0 120 mode-addr = <6>; 121 mode-val = <NETXBIG_LED_OFF 0 129 mode-addr = <7>; 130 mode-val = <NETXBIG_LED_OFF 0 [all …]
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| /arch/mips/kernel/ |
| A D | irq_txx9.c | 63 unsigned char mode; member 95 if (unlikely(TXx9_IRCR_EDGE(txx9irq[irq_nr].mode))) in txx9_irq_mask_ack() 105 int mode; in txx9_irq_set_type() local 110 case IRQF_TRIGGER_RISING: mode = TXx9_IRCR_UP; break; in txx9_irq_set_type() 111 case IRQF_TRIGGER_FALLING: mode = TXx9_IRCR_DOWN; break; in txx9_irq_set_type() 112 case IRQF_TRIGGER_HIGH: mode = TXx9_IRCR_HIGH; break; in txx9_irq_set_type() 113 case IRQF_TRIGGER_LOW: mode = TXx9_IRCR_LOW; break; in txx9_irq_set_type() 121 cr |= (mode & 0x3) << ofs; in txx9_irq_set_type() 123 txx9irq[irq_nr].mode = mode; in txx9_irq_set_type() 143 txx9irq[i].mode = TXx9_IRCR_LOW; in txx9_irq_init()
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| /arch/arm64/crypto/ |
| A D | Kconfig | 102 - ECB (Electronic Codebook) mode (NIST SP800-38A) 104 - CTR (Counter) mode (NIST SP800-38A) 119 - ECB (Electronic Codebook) mode (NIST SP800-38A) 121 - CTR (Counter) mode (NIST SP800-38A) 137 - ECB (Electronic Codebook) mode (NIST SP800-38A) 139 - CTR (Counter) mode (NIST SP800-38A) 140 - XCTR mode for HCTR2 170 - CTR (Counter) mode (NIST SP800-38A) 188 - CTR (Counter) mode (NIST SP800-38A) 204 authenticated encryption mode (NIST SP800-38C) [all …]
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| /arch/arm/boot/dts/sigmastar/ |
| A D | mstar-infinity3.dtsi | 21 turbo-mode; 28 turbo-mode; 35 turbo-mode; 42 turbo-mode; 49 turbo-mode; 56 turbo-mode; 63 turbo-mode;
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