| /arch/arm/mach-milbeaut/ |
| A D | platsmp.c | 25 unsigned int mpidr, cpu, cluster; in m10v_boot_secondary() local 30 mpidr = cpu_logical_map(l_cpu); in m10v_boot_secondary() 31 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in m10v_boot_secondary() 32 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in m10v_boot_secondary() 48 unsigned int mpidr, cpu, cluster; in m10v_smp_init() local 59 mpidr = read_cpuid_mpidr(); in m10v_smp_init() 60 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in m10v_smp_init() 61 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in m10v_smp_init() 78 unsigned int mpidr, cpu; in m10v_cpu_kill() local 80 mpidr = cpu_logical_map(l_cpu); in m10v_cpu_kill() [all …]
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| /arch/arm/common/ |
| A D | mcpm_platsmp.c | 22 unsigned int mpidr; in cpu_to_pcpu() local 24 mpidr = cpu_logical_map(cpu); in cpu_to_pcpu() 25 *pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in cpu_to_pcpu() 26 *pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in cpu_to_pcpu() 73 unsigned int mpidr, pcpu, pcluster; in mcpm_cpu_die() local 74 mpidr = read_cpuid_mpidr(); in mcpm_cpu_die() 75 pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_die() 76 pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_die()
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| A D | mcpm_entry.c | 241 unsigned int mpidr, cpu, cluster; in mcpm_cpu_power_down() local 245 mpidr = read_cpuid_mpidr(); in mcpm_cpu_power_down() 246 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_power_down() 247 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_power_down() 330 unsigned int mpidr = read_cpuid_mpidr(); in mcpm_cpu_suspend() local 342 unsigned int mpidr, cpu, cluster; in mcpm_cpu_powered_up() local 349 mpidr = read_cpuid_mpidr(); in mcpm_cpu_powered_up() 350 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_powered_up() 376 unsigned int mpidr = read_cpuid_mpidr(); in nocache_trampoline() local 426 unsigned int i, j, mpidr, this_cluster; in mcpm_sync_init() local [all …]
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| A D | bL_switcher.c | 124 unsigned int mpidr = read_mpidr(); in bL_switchpoint() local 125 unsigned int clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1); in bL_switchpoint() 149 unsigned int mpidr, this_cpu, that_cpu; in bL_switch_to() local 236 mpidr = read_mpidr(); in bL_switch_to() 237 pr_debug("after switch: CPU %d MPIDR %#x\n", this_cpu, mpidr); in bL_switch_to() 238 BUG_ON(mpidr != ib_mpidr); in bL_switch_to() 513 int bL_switcher_get_logical_index(u32 mpidr) in bL_switcher_get_logical_index() argument 520 mpidr &= MPIDR_HWID_BITMASK; in bL_switcher_get_logical_index() 525 if ((mpidr == cpu_logical_map(cpu)) || in bL_switcher_get_logical_index() 526 (mpidr == cpu_logical_map(pairing))) in bL_switcher_get_logical_index()
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| /arch/arm/kernel/ |
| A D | topology.c | 188 unsigned int mpidr; in store_cpu_topology() local 193 mpidr = read_cpuid_mpidr(); in store_cpu_topology() 196 if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) { in store_cpu_topology() 202 if (mpidr & MPIDR_MT_BITMASK) { in store_cpu_topology() 204 cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in store_cpu_topology() 205 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); in store_cpu_topology() 206 cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 2); in store_cpu_topology() 210 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in store_cpu_topology() 211 cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); in store_cpu_topology() 229 cpu_topology[cpuid].package_id, mpidr); in store_cpu_topology()
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| A D | sleep.S | 38 .macro compute_mpidr_hash dst, rs0, rs1, rs2, mpidr, mask 39 and \mpidr, \mpidr, \mask @ mask out MPIDR bits 40 and \dst, \mpidr, #0xff @ mask=aff0 43 and \mask, \mpidr, #0xff00 @ mask = aff1 47 and \mask, \mpidr, #0xff0000 @ mask = aff2 85 ldmia r0, {r1, r6-r8} @ r1 = mpidr mask (r6,r7,r8) = l[0,1,2] shifts
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| A D | devtree.c | 76 u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; in arm_dt_init_cpu_maps() local 122 if (hwid == mpidr) { in arm_dt_init_cpu_maps()
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| /arch/arm/mach-hisi/ |
| A D | platmcpm.c | 100 unsigned int mpidr, cpu, cluster; in hip04_boot_secondary() local 104 mpidr = cpu_logical_map(l_cpu); in hip04_boot_secondary() 105 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in hip04_boot_secondary() 155 unsigned int mpidr, cpu, cluster; in hip04_cpu_die() local 158 mpidr = cpu_logical_map(l_cpu); in hip04_cpu_die() 159 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in hip04_cpu_die() 193 unsigned int mpidr, cpu, cluster; in hip04_cpu_kill() local 196 mpidr = cpu_logical_map(l_cpu); in hip04_cpu_kill() 197 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in hip04_cpu_kill() 249 unsigned int mpidr, cpu, cluster; in hip04_cpu_table_init() local [all …]
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| /arch/arm64/kernel/ |
| A D | sleep.S | 39 .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask 40 and \mpidr, \mpidr, \mask // mask out MPIDR bits 41 and \dst, \mpidr, #0xff // mask=aff0 43 and \mask, \mpidr, #0xff00 // mask = aff1 46 and \mask, \mpidr, #0xff0000 // mask = aff2 49 and \mask, \mpidr, #0xff00000000 // mask = aff3
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| A D | setup.c | 92 u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; in smp_setup_processor_id() local 93 set_cpu_logical_map(0, mpidr); in smp_setup_processor_id() 96 (unsigned long)mpidr, read_cpuid_id()); in smp_setup_processor_id()
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| /arch/arm/mach-sunxi/ |
| A D | mc_smp.c | 393 unsigned int mpidr, cpu, cluster; in sunxi_mc_smp_boot_secondary() local 395 mpidr = cpu_logical_map(l_cpu); in sunxi_mc_smp_boot_secondary() 396 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in sunxi_mc_smp_boot_secondary() 445 unsigned int mpidr, cpu, cluster; in sunxi_mc_smp_cpu_die() local 448 mpidr = cpu_logical_map(l_cpu); in sunxi_mc_smp_cpu_die() 449 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in sunxi_mc_smp_cpu_die() 535 unsigned int mpidr, cpu, cluster; in sunxi_mc_smp_cpu_kill() local 540 mpidr = cpu_logical_map(l_cpu); in sunxi_mc_smp_cpu_kill() 541 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in sunxi_mc_smp_cpu_kill() 630 unsigned int mpidr, cpu, cluster; in sunxi_mc_smp_cpu_table_init() local [all …]
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| /arch/arm/mach-exynos/ |
| A D | platsmp.c | 51 u32 mpidr = cpu_logical_map(cpu); in platform_do_lowpower() local 52 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in platform_do_lowpower() 320 u32 mpidr = cpu_logical_map(cpu); in exynos_boot_secondary() local 321 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in exynos_boot_secondary() 425 u32 mpidr = cpu_logical_map(cpu); in exynos_cpu_die() local 426 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in exynos_cpu_die()
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| A D | suspend.c | 267 unsigned int mpidr = read_cpuid_mpidr(); in exynos5420_cpu_suspend() local 268 unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in exynos5420_cpu_suspend() 269 unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in exynos5420_cpu_suspend() 453 unsigned int mpidr, cluster; in exynos5420_prepare_pm_resume() local 455 mpidr = read_cpuid_mpidr(); in exynos5420_prepare_pm_resume() 456 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in exynos5420_prepare_pm_resume()
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| /arch/arm64/include/asm/ |
| A D | smp_plat.h | 35 static inline int get_logical_index(u64 mpidr) in get_logical_index() argument 39 if (cpu_logical_map(cpu) == mpidr) in get_logical_index()
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| A D | cputype.h | 21 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \ argument 22 ((mpidr >> MPIDR_LEVEL_SHIFT(level)) & MPIDR_LEVEL_MASK)
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| /arch/arm64/kvm/hyp/nvhe/ |
| A D | psci-relay.c | 78 static unsigned int find_cpu_id(u64 mpidr) in find_cpu_id() argument 83 if (mpidr & ~MPIDR_HWID_BITMASK) in find_cpu_id() 87 if (cpu_logical_map(i) == mpidr) in find_cpu_id() 109 DECLARE_REG(u64, mpidr, host_ctxt, 1); in psci_cpu_on() 125 cpu_id = find_cpu_id(mpidr); in psci_cpu_on() 140 ret = psci_call(func_id, mpidr, in psci_cpu_on()
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| /arch/arm/include/asm/ |
| A D | bL_switcher.h | 55 int bL_switcher_get_logical_index(u32 mpidr); 71 static inline int bL_switcher_get_logical_index(u32 mpidr) { return -EUNATCH; } in bL_switcher_get_logical_index() argument
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| A D | smp_plat.h | 80 static inline int get_logical_index(u32 mpidr) in get_logical_index() argument 84 if (cpu_logical_map(cpu) == mpidr) in get_logical_index()
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| A D | cputype.h | 62 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \ argument 63 ((mpidr >> (MPIDR_LEVEL_BITS * level)) & MPIDR_LEVEL_MASK)
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| /arch/arm/mach-versatile/ |
| A D | tc2_pm.c | 202 unsigned int mpidr, cpu, cluster; in tc2_pm_init() local 242 mpidr = read_cpuid_mpidr(); in tc2_pm_init() 243 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in tc2_pm_init() 244 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in tc2_pm_init()
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| /arch/arm64/kvm/hyp/vhe/ |
| A D | sysreg-sr.c | 201 u64 midr, mpidr; in __vcpu_load_switch_sysregs() local 235 mpidr = ctxt_sys_reg(guest_ctxt, VMPIDR_EL2); in __vcpu_load_switch_sysregs() 238 mpidr = ctxt_sys_reg(guest_ctxt, MPIDR_EL1); in __vcpu_load_switch_sysregs() 241 __sysreg_restore_el1_state(guest_ctxt, midr, mpidr); in __vcpu_load_switch_sysregs()
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| /arch/arm64/kvm/vgic/ |
| A D | vgic-mmio-v3.c | 224 ret = extract_bytes(READ_ONCE(irq->mpidr), addr & 7, len); in vgic_mmio_read_irouter() 250 irq->mpidr = val & GENMASK(23, 0); in vgic_mmio_write_irouter() 251 irq->target_vcpu = kvm_mpidr_to_vcpu(vcpu->kvm, irq->mpidr); in vgic_mmio_write_irouter() 341 unsigned long mpidr = kvm_vcpu_get_mpidr_aff(vcpu); in vgic_mmio_read_v3r_typer() local 345 value = (u64)(mpidr & GENMASK(23, 0)) << 32; in vgic_mmio_read_v3r_typer() 1098 u64 mpidr; in vgic_v3_dispatch_sgi() local 1118 mpidr = SGI_AFFINITY_LEVEL(reg, 3); in vgic_v3_dispatch_sgi() 1119 mpidr |= SGI_AFFINITY_LEVEL(reg, 2); in vgic_v3_dispatch_sgi() 1120 mpidr |= SGI_AFFINITY_LEVEL(reg, 1); in vgic_v3_dispatch_sgi() 1124 c_vcpu = kvm_mpidr_to_vcpu(kvm, mpidr | aff0); in vgic_v3_dispatch_sgi()
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| /arch/arm64/kvm/ |
| A D | psci.c | 124 unsigned long i, mpidr; in kvm_psci_vcpu_affinity_info() local 150 mpidr = kvm_vcpu_get_mpidr_aff(tmp); in kvm_psci_vcpu_affinity_info() 151 if ((mpidr & target_affinity_mask) == target_affinity) { in kvm_psci_vcpu_affinity_info()
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| /arch/arm/mach-shmobile/ |
| A D | headsmp.S | 103 add r5, r5, r2 @ array of per-cpu mpidr values
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| /arch/arm64/kvm/hyp/include/hyp/ |
| A D | sysreg-sr.h | 212 u64 midr, u64 mpidr) in __sysreg_restore_el1_state() argument 215 write_sysreg(mpidr, vmpidr_el2); in __sysreg_restore_el1_state()
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