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Searched refs:msrval (Results 1 – 6 of 6) sorted by relevance

/arch/x86/kernel/
A Dshstk.c445 u64 msrval; in wrss_control() local
463 rdmsrq(MSR_IA32_U_CET, msrval); in wrss_control()
467 msrval |= CET_WRSS_EN; in wrss_control()
470 if (!(msrval & CET_WRSS_EN)) in wrss_control()
473 msrval &= ~CET_WRSS_EN; in wrss_control()
476 wrmsrq(MSR_IA32_U_CET, msrval); in wrss_control()
A Dprocess.c339 u64 msrval; in set_cpuid_faulting() local
341 msrval = this_cpu_read(msr_misc_features_shadow); in set_cpuid_faulting()
342 msrval &= ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT; in set_cpuid_faulting()
343 msrval |= (on << MSR_MISC_FEATURES_ENABLES_CPUID_FAULT_BIT); in set_cpuid_faulting()
344 this_cpu_write(msr_misc_features_shadow, msrval); in set_cpuid_faulting()
345 wrmsrq(MSR_MISC_FEATURES_ENABLES, msrval); in set_cpuid_faulting()
/arch/x86/kernel/cpu/
A Dtopology_amd.c154 u64 msrval; in topoext_fixup() local
164 rdmsrq(0xc0011005, msrval); in topoext_fixup()
165 if (msrval & BIT_64(54)) { in topoext_fixup()
A Dbugs.c359 u64 msrval = x86_amd_ls_cfg_base | x86_amd_ls_cfg_ssbd_mask; in x86_amd_ssb_disable() local
364 wrmsrq(MSR_AMD64_LS_CFG, msrval); in x86_amd_ssb_disable()
/arch/x86/kernel/cpu/resctrl/
A Drdtgroup.c92 u64 msrval; in resctrl_arch_mon_event_config_read() local
99 rdmsrq(MSR_IA32_EVT_CFG_BASE + index, msrval); in resctrl_arch_mon_event_config_read()
102 config_info->mon_config = msrval & MAX_EVT_CONFIG_BITS; in resctrl_arch_mon_event_config_read()
/arch/x86/kernel/cpu/mce/
A Dcore.c1904 u64 msrval; in __mcheck_cpu_check_banks() local
1913 rdmsrq(mca_msr_reg(i, MCA_CTL), msrval); in __mcheck_cpu_check_banks()
1914 b->init = !!msrval; in __mcheck_cpu_check_banks()

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