Searched refs:ncsr_write (Results 1 – 6 of 6) sorted by relevance
| /arch/riscv/kvm/ |
| A D | vcpu_timer.c | 75 ncsr_write(CSR_VSTIMECMP, ncycles & 0xFFFFFFFF); in kvm_riscv_vcpu_update_vstimecmp()
76 ncsr_write(CSR_VSTIMECMPH, ncycles >> 32); in kvm_riscv_vcpu_update_vstimecmp()
78 ncsr_write(CSR_VSTIMECMP, ncycles); in kvm_riscv_vcpu_update_vstimecmp()
293 ncsr_write(CSR_HTIMEDELTA, (u32)(gt->time_delta)); in kvm_riscv_vcpu_update_timedelta()
294 ncsr_write(CSR_HTIMEDELTAH, (u32)(gt->time_delta >> 32)); in kvm_riscv_vcpu_update_timedelta()
296 ncsr_write(CSR_HTIMEDELTA, gt->time_delta); in kvm_riscv_vcpu_update_timedelta()
310 ncsr_write(CSR_VSTIMECMP, (u32)t->next_cycles); in kvm_riscv_vcpu_timer_restore()
311 ncsr_write(CSR_VSTIMECMPH, (u32)(t->next_cycles >> 32)); in kvm_riscv_vcpu_timer_restore()
313 ncsr_write(CSR_VSTIMECMP, t->next_cycles); in kvm_riscv_vcpu_timer_restore()
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| A D | vcpu_exit.c | 158 ncsr_write(CSR_VSSTATUS, vsstatus); in kvm_riscv_vcpu_trap_redirect()
161 ncsr_write(CSR_VSCAUSE, trap->scause); in kvm_riscv_vcpu_trap_redirect()
162 ncsr_write(CSR_VSTVAL, trap->stval); in kvm_riscv_vcpu_trap_redirect()
163 ncsr_write(CSR_VSEPC, trap->sepc); in kvm_riscv_vcpu_trap_redirect()
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| A D | aia.c | 105 ncsr_write(CSR_HVIPH, vcpu->arch.aia_context.guest_csr.hviph); in kvm_riscv_vcpu_aia_update_hvip()
107 ncsr_write(CSR_HVICTL, aia_hvictl_value(!!(csr->hvip & BIT(IRQ_VS_EXT)))); in kvm_riscv_vcpu_aia_update_hvip()
319 ncsr_write(CSR_HVIPRIO1, hviprio); in aia_set_iprio8()
323 ncsr_write(CSR_HVIPRIO2, hviprio); in aia_set_iprio8()
326 ncsr_write(CSR_HVIPRIO1H, hviprio); in aia_set_iprio8()
329 ncsr_write(CSR_HVIPRIO2, hviprio); in aia_set_iprio8()
332 ncsr_write(CSR_HVIPRIO2H, hviprio); in aia_set_iprio8()
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| A D | mmu.c | 483 ncsr_write(CSR_HGATP, hgatp); in kvm_riscv_mmu_update_hgatp()
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| A D | vcpu.c | 745 ncsr_write(CSR_HVIP, csr->hvip); in kvm_riscv_update_hvip()
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| /arch/riscv/include/asm/ |
| A D | kvm_nacl.h | 221 #define ncsr_write(__csr, __val) \ macro
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