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/arch/mips/mm/
A Dpage.c266 int off; in build_clear_page() local
301 while (off) { in build_clear_page()
312 off = -off; in build_clear_page()
324 off = 0; in build_clear_page()
330 off = -off; in build_clear_page()
415 int off; in build_copy_page() local
486 off = -off; in build_copy_page()
513 off = 0; in build_copy_page()
531 off = -off; in build_copy_page()
555 off = 0; in build_copy_page()
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/arch/powerpc/boot/
A Daddnote.c64 #define GET_16BE(off) ((buf[off] << 8) + (buf[(off)+1])) argument
65 #define GET_32BE(off) ((GET_16BE(off) << 16U) + GET_16BE((off)+2U)) argument
70 #define PUT_32BE(off, v)(PUT_16BE((off), (v) >> 16L), PUT_16BE((off) + 2, (v))) argument
74 #define GET_16LE(off) ((buf[off]) + (buf[(off)+1] << 8)) argument
75 #define GET_32LE(off) (GET_16LE(off) + (GET_16LE((off)+2U) << 16U)) argument
78 #define PUT_16LE(off, v) (buf[off] = (v) & 0xff, \ argument
80 #define PUT_32LE(off, v) (PUT_16LE((off), (v)), PUT_16LE((off) + 2, (v) >> 16L)) argument
81 #define PUT_64LE(off, v) (PUT_32LE((off), (v)), PUT_32LE((off) + 4, (v) >> 32L)) argument
83 #define GET_16(off) (e_data == ELFDATA2MSB ? GET_16BE(off) : GET_16LE(off)) argument
84 #define GET_32(off) (e_data == ELFDATA2MSB ? GET_32BE(off) : GET_32LE(off)) argument
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/arch/mips/include/asm/
A Dmips-gic.h30 #define GIC_ACCESSOR_RO(sz, off, name) \ argument
35 #define GIC_ACCESSOR_RW(sz, off, name) \ argument
40 #define GIC_VX_ACCESSOR_RO(sz, off, name) \ argument
45 #define GIC_VX_ACCESSOR_RW(sz, off, name) \ argument
96 #define _GIC_ACCESSOR_RO_INTR_BIT(off, name) \ argument
99 return mips_gic_base + (off); \
120 _GIC_ACCESSOR_RO_INTR_BIT(off, name) \
159 #define GIC_ACCESSOR_RO_INTR_BIT(off, name) \ argument
160 _GIC_ACCESSOR_RO_INTR_BIT(off, name) \
163 #define GIC_ACCESSOR_RW_INTR_BIT(off, name) \ argument
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A Dmips-cpc.h64 #define CPC_ACCESSOR_RO(sz, off, name) \ argument
65 CPS_ACCESSOR_RO(cpc, sz, MIPS_CPC_GCB_OFS + off, name) \
66 CPS_ACCESSOR_RO(cpc, sz, MIPS_CPC_COCB_OFS + off, redir_##name)
68 #define CPC_ACCESSOR_RW(sz, off, name) \ argument
69 CPS_ACCESSOR_RW(cpc, sz, MIPS_CPC_GCB_OFS + off, name) \
72 #define CPC_CX_ACCESSOR_RO(sz, off, name) \ argument
73 CPS_ACCESSOR_RO(cpc, sz, MIPS_CPC_CLCB_OFS + off, cl_##name) \
74 CPS_ACCESSOR_RO(cpc, sz, MIPS_CPC_COCB_OFS + off, co_##name)
76 #define CPC_CX_ACCESSOR_RW(sz, off, name) \ argument
77 CPS_ACCESSOR_RW(cpc, sz, MIPS_CPC_CLCB_OFS + off, cl_##name) \
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A Duasm.h212 # define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off) argument
213 # define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off) argument
224 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sd(buf, rs, rt, off) argument
228 # define UASM_i_LL(buf, rs, rt, off) uasm_i_ll(buf, rs, rt, off) argument
229 # define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off) argument
234 # define UASM_i_SC(buf, rs, rt, off) uasm_i_sc(buf, rs, rt, off) argument
243 #define uasm_i_b(buf, off) uasm_i_beq(buf, 0, 0, off) argument
244 #define uasm_i_beqz(buf, rs, off) uasm_i_beq(buf, rs, 0, off) argument
245 #define uasm_i_beqzl(buf, rs, off) uasm_i_beql(buf, rs, 0, off) argument
246 #define uasm_i_bnez(buf, rs, off) uasm_i_bne(buf, rs, 0, off) argument
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/arch/s390/include/asm/
A Dboot_data.h27 size_t off = boot_rb_off + strlen(boot_rb + boot_rb_off) + 1; \
29 for (; off < sizeof(boot_rb) && (len = strlen(boot_rb + off)); off += len + 1) \
30 cb(boot_rb + off); \
31 for (off = 0; off < boot_rb_off && (len = strlen(boot_rb + off)); off += len + 1) \
32 cb(boot_rb + off); \
/arch/riscv/kvm/
A Daia_aplic.c393 if ((off & 0x3) != 0) in aplic_mmio_read_offset()
396 if (off == APLIC_DOMAINCFG) { in aplic_mmio_read_offset()
405 i = (off - APLIC_SETIP_BASE) >> 2; in aplic_mmio_read_offset()
407 } else if (off == APLIC_SETIPNUM) { in aplic_mmio_read_offset()
411 i = (off - APLIC_CLRIP_BASE) >> 2; in aplic_mmio_read_offset()
413 } else if (off == APLIC_CLRIPNUM) { in aplic_mmio_read_offset()
417 i = (off - APLIC_SETIE_BASE) >> 2; in aplic_mmio_read_offset()
430 } else if (off == APLIC_GENMSI) { in aplic_mmio_read_offset()
458 if ((off & 0x3) != 0) in aplic_mmio_write_offset()
461 if (off == APLIC_DOMAINCFG) { in aplic_mmio_write_offset()
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/arch/sparc/kernel/
A Djump_label.c19 s32 off = (s32)entry->target - (s32)entry->code; in arch_jump_label_transform() local
22 BUG_ON(off & 3); in arch_jump_label_transform()
25 if (off <= 0xfffff && off >= -0x100000) in arch_jump_label_transform()
31 val = 0x10680000 | (((u32) off >> 2) & 0x7ffff); in arch_jump_label_transform()
34 BUG_ON(off > 0x7fffff); in arch_jump_label_transform()
35 BUG_ON(off < -0x800000); in arch_jump_label_transform()
37 val = 0x10800000 | (((u32) off >> 2) & 0x3fffff); in arch_jump_label_transform()
/arch/powerpc/platforms/powernv/
A Dopal-nvram.c29 int off; in opal_nvram_read() local
33 off = *index; in opal_nvram_read()
34 if ((off + count) > nvram_size) in opal_nvram_read()
35 count = nvram_size - off; in opal_nvram_read()
36 rc = opal_read_nvram(__pa(buf), count, off); in opal_nvram_read()
50 int off; in opal_nvram_write() local
54 off = *index; in opal_nvram_write()
55 if ((off + count) > nvram_size) in opal_nvram_write()
56 count = nvram_size - off; in opal_nvram_write()
59 rc = opal_write_nvram(__pa(buf), count, off); in opal_nvram_write()
/arch/arm/boot/dts/ti/omap/
A Dam572x-idk-common.dtsi56 default-state = "off";
63 default-state = "off";
69 default-state = "off";
76 default-state = "off";
83 default-state = "off";
89 default-state = "off";
100 default-state = "off";
106 default-state = "off";
112 default-state = "off";
118 default-state = "off";
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A Dam571x-idk.dts56 default-state = "off";
63 default-state = "off";
69 default-state = "off";
76 default-state = "off";
82 default-state = "off";
88 default-state = "off";
99 default-state = "off";
105 default-state = "off";
111 default-state = "off";
117 default-state = "off";
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A Domap3430-sdp.dts64 gpmc,cs-rd-off-ns = <186>;
65 gpmc,cs-wr-off-ns = <186>;
67 gpmc,adv-rd-off-ns = <48>;
68 gpmc,adv-wr-off-ns = <48>;
70 gpmc,oe-off-ns = <168>;
72 gpmc,we-off-ns = <168>;
113 gpmc,cs-rd-off-ns = <36>;
119 gpmc,oe-off-ns = <48>;
121 gpmc,we-off-ns = <30>;
164 gpmc,oe-off-ns = <84>;
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A Dam335x-moxa-uc-8100-me-t.dts25 default-state = "off";
31 default-state = "off";
37 default-state = "off";
43 default-state = "off";
48 default-state = "off";
53 default-state = "off";
58 default-state = "off";
63 default-state = "off";
68 default-state = "off";
/arch/arc/include/asm/
A Dlinkage.h17 .macro ST2 e, o, off
19 std \e, [sp, \off]
21 st \e, [sp, \off]
22 st \o, [sp, \off+4]
26 .macro LD2 e, o, off
28 ldd \e, [sp, \off]
30 ld \e, [sp, \off]
31 ld \o, [sp, \off+4]
/arch/arc/lib/
A Dmemset-archs.S20 .macro PREALLOC_INSTR reg, off
21 prealloc [\reg, \off]
24 .macro PREFETCHW_INSTR reg, off
25 prefetchw [\reg, \off]
30 .macro PREALLOC_INSTR reg, off
33 .macro PREFETCHW_INSTR reg, off
/arch/riscv/net/
A Dbpf_jit_comp64.c173 s64 off = addr - ip; in emit_addr() local
455 s64 off = 0; in emit_call() local
464 off = addr - ip; in emit_call()
615 s16 off = insn->off; in emit_atomic_ld_st() local
672 s16 off = insn->off; in emit_atomic_rmw() local
683 if (off) { in emit_atomic_rmw()
1337 s16 off = insn->off; in bpf_jit_emit_insn() local
1437 if (off) in bpf_jit_emit_insn()
1446 if (off) in bpf_jit_emit_insn()
1575 if (off) in bpf_jit_emit_insn()
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/arch/mips/alchemy/common/
A Dgpiolib.c121 static int alchemy_gpic_get(struct gpio_chip *chip, unsigned int off) in alchemy_gpic_get() argument
123 return !!au1300_gpio_get_value(off + AU1300_GPIO_BASE); in alchemy_gpic_get()
126 static int alchemy_gpic_set(struct gpio_chip *chip, unsigned int off, int v) in alchemy_gpic_set() argument
128 au1300_gpio_set_value(off + AU1300_GPIO_BASE, v); in alchemy_gpic_set()
133 static int alchemy_gpic_dir_input(struct gpio_chip *chip, unsigned int off) in alchemy_gpic_dir_input() argument
135 return au1300_gpio_direction_input(off + AU1300_GPIO_BASE); in alchemy_gpic_dir_input()
138 static int alchemy_gpic_dir_output(struct gpio_chip *chip, unsigned int off, in alchemy_gpic_dir_output() argument
141 return au1300_gpio_direction_output(off + AU1300_GPIO_BASE, v); in alchemy_gpic_dir_output()
144 static int alchemy_gpic_gpio_to_irq(struct gpio_chip *chip, unsigned int off) in alchemy_gpic_gpio_to_irq() argument
146 return au1300_gpio_to_irq(off + AU1300_GPIO_BASE); in alchemy_gpic_gpio_to_irq()
/arch/arm/include/asm/
A Dpercpu.h17 static inline void set_my_cpu_offset(unsigned long off) in set_my_cpu_offset() argument
25 asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (off) : "memory"); in set_my_cpu_offset()
30 unsigned long off; in __my_cpu_offset() local
57 : "=r" (off) in __my_cpu_offset()
60 return off; in __my_cpu_offset()
/arch/arc/boot/dts/
A Dabilis_tb100_dvk.dts67 default-state = "off";
72 default-state = "off";
77 default-state = "off";
82 default-state = "off";
87 default-state = "off";
92 default-state = "off";
97 default-state = "off";
102 default-state = "off";
107 default-state = "off";
112 default-state = "off";
A Dabilis_tb101_dvk.dts67 default-state = "off";
72 default-state = "off";
77 default-state = "off";
82 default-state = "off";
87 default-state = "off";
92 default-state = "off";
97 default-state = "off";
102 default-state = "off";
107 default-state = "off";
112 default-state = "off";
/arch/xtensa/include/asm/
A Dpage.h145 unsigned long off = va - PAGE_OFFSET; in ___pa() local
147 if (off >= XCHAL_KSEG_SIZE) in ___pa()
148 off -= XCHAL_KSEG_SIZE; in ___pa()
151 return off + PHYS_OFFSET; in ___pa()
153 if (off < XCHAL_KSEG_SIZE) in ___pa()
154 return off + PHYS_OFFSET; in ___pa()
156 off -= XCHAL_KSEG_SIZE; in ___pa()
157 if (off >= XCHAL_KIO_SIZE) in ___pa()
158 off -= XCHAL_KIO_SIZE; in ___pa()
160 return off + XCHAL_KIO_PADDR; in ___pa()
/arch/mips/bcm47xx/
A Dprom.c62 unsigned long off; in prom_init_mem() local
79 off = CPHYSADDR((unsigned long)prom_init); in prom_init_mem()
86 if (off + mem >= max) { in prom_init_mem()
140 unsigned long off = (unsigned long)prom_init; in bcm47xx_prom_highmem_init() local
164 off = EXTVBASE + __pa(off); in bcm47xx_prom_highmem_init()
166 if (!memcmp((void *)prom_init, (void *)(off + extmem), 16)) in bcm47xx_prom_highmem_init()
/arch/arm/include/asm/hardware/
A Diomd.h20 #define iomd_readb(off) __raw_readb(IOMD_BASE + (off)) argument
21 #define iomd_readl(off) __raw_readl(IOMD_BASE + (off)) argument
22 #define iomd_writeb(val,off) __raw_writeb(val, IOMD_BASE + (off)) argument
23 #define iomd_writel(val,off) __raw_writel(val, IOMD_BASE + (off)) argument
/arch/openrisc/include/asm/
A Dcmpxchg.h62 int off = (unsigned long)ptr % sizeof(u32); in cmpxchg_small() local
63 volatile u32 *p = ptr - off; in cmpxchg_small()
65 int bitoff = (sizeof(u32) - size - off) * BITS_PER_BYTE; in cmpxchg_small()
67 int bitoff = off * BITS_PER_BYTE; in cmpxchg_small()
94 int off = (unsigned long)ptr % sizeof(u32); in xchg_small() local
95 volatile u32 *p = ptr - off; in xchg_small()
97 int bitoff = (sizeof(u32) - size - off) * BITS_PER_BYTE; in xchg_small()
99 int bitoff = off * BITS_PER_BYTE; in xchg_small()
/arch/mips/net/
A Dbpf_jit_comp64.c483 int off; in emit_tail_call() local
494 if (off > 0x7fff) in emit_tail_call()
506 if (off > 0x7fff) in emit_tail_call()
518 if (off > 0x7fff) in emit_tail_call()
641 s16 off = insn->off; in build_insn() local
920 if (off == 0) in build_insn()
951 if (off == 0) in build_insn()
987 if (off == 0) in build_insn()
1016 if (off == 0) in build_insn()
1031 if (off == 0) in build_insn()
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