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Searched refs:opcode (Results 1 – 25 of 162) sorted by relevance

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/arch/arm/nwfpe/
A Dfpopcode.h195 #define getOffset(opcode) (opcode & MASK_OFFSET) argument
203 #define LDF_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 1)) argument
204 #define LFM_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 2)) argument
205 #define STF_OP(opcode) (STORE_OP(opcode) && (getCoprocessorNumber(opcode) == 1)) argument
206 #define SFM_OP(opcode) (STORE_OP(opcode) && (getCoprocessorNumber(opcode) == 2)) argument
213 #define LOAD(opcode) ((opcode & BIT_LOAD) != 0) argument
214 #define STORE(opcode) ((opcode & BIT_LOAD) == 0) argument
339 #define getCondition(opcode) (opcode >> 28) argument
348 #define getFn(opcode) ((opcode & MASK_Fn) >> 16) argument
351 #define getFm(opcode) (opcode & MASK_Fm) argument
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A Dfpa11_cpdt.c224 if (BIT_UP_SET(opcode)) in PerformLDF()
229 if (PREINDEXED(opcode)) in PerformLDF()
272 if (BIT_UP_SET(opcode)) in PerformSTF()
277 if (PREINDEXED(opcode)) in PerformSTF()
318 if (BIT_UP_SET(opcode)) in PerformLFM()
323 if (PREINDEXED(opcode)) in PerformLFM()
328 Fd = getFd(opcode); in PerformLFM()
354 if (BIT_UP_SET(opcode)) in PerformSFM()
359 if (PREINDEXED(opcode)) in PerformSFM()
364 Fd = getFd(opcode); in PerformSFM()
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A Dfpa11_cprt.c26 if (opcode & 0x800000) { in EmulateCPRT()
31 return PerformComparison(opcode); in EmulateCPRT()
37 return PerformFLT(opcode); in EmulateCPRT()
40 return PerformFIX(opcode); in EmulateCPRT()
70 fpa11->fpreg[getFn(opcode)].fSingle = int32_to_float32(&roundData, readRegister(getRd(opcode))); in PerformFLT()
77 fpa11->fpreg[getFn(opcode)].fDouble = int32_to_float64(readRegister(getRd(opcode))); in PerformFLT()
85 fpa11->fpreg[getFn(opcode)].fExtended = int32_to_floatx80(readRegister(getRd(opcode))); in PerformFLT()
103 unsigned int Fn = getFm(opcode); in PerformFIX()
145 unsigned int Fn = getFn(opcode), Fm = getFm(opcode); in PerformComparison()
184 if (CONSTANT_FM(opcode)) { in PerformComparison()
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A Dfpa11.c35 int8 SetRoundingMode(const unsigned int opcode) in SetRoundingMode() argument
37 switch (opcode & MASK_ROUNDING_MODE) { in SetRoundingMode()
56 switch (opcode & MASK_ROUNDING_PRECISION) { in SetRoundingPrecision()
85 unsigned int EmulateAll(unsigned int opcode) in EmulateAll() argument
90 printk("NWFPE: emulating opcode %08x\n", opcode); in EmulateAll()
92 code = opcode & 0x00000f00; in EmulateAll()
95 code = opcode & 0x0e000000; in EmulateAll()
97 if (opcode & 0x00000010) { in EmulateAll()
101 return EmulateCPRT(opcode); in EmulateAll()
105 return EmulateCPDO(opcode); in EmulateAll()
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A Dfpa11_cpdo.c27 nDest = getDestinationSize(opcode); in EmulateCPDO()
31 roundData.mode = SetRoundingMode(opcode); in EmulateCPDO()
40 if (MONADIC_INSTRUCTION(opcode)) in EmulateCPDO()
43 nType = fpa11->fType[getFn(opcode)]; in EmulateCPDO()
45 if (!CONSTANT_FM(opcode)) { in EmulateCPDO()
46 register unsigned int Fm = getFm(opcode); in EmulateCPDO()
52 rFd = &fpa11->fpreg[getFd(opcode)]; in EmulateCPDO()
56 nRc = SingleCPDO(&roundData, opcode, rFd); in EmulateCPDO()
59 nRc = DoubleCPDO(&roundData, opcode, rFd); in EmulateCPDO()
63 nRc = ExtendedCPDO(&roundData, opcode, rFd); in EmulateCPDO()
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A Dfpa11.h85 extern unsigned int EmulateAll(unsigned int opcode);
87 extern unsigned int EmulateCPDT(const unsigned int opcode);
88 extern unsigned int EmulateCPDO(const unsigned int opcode);
89 extern unsigned int EmulateCPRT(const unsigned int opcode);
92 extern unsigned int PerformLDF(const unsigned int opcode);
93 extern unsigned int PerformSTF(const unsigned int opcode);
94 extern unsigned int PerformLFM(const unsigned int opcode);
95 extern unsigned int PerformSFM(const unsigned int opcode);
100 const unsigned int opcode, FPREG * rFd);
103 const unsigned int opcode, FPREG * rFd);
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/arch/riscv/kernel/probes/
A Dsimulate-insn.c87 #define auipc_rd_idx(opcode) \ argument
88 ((opcode >> 7) & 0x1f)
90 #define auipc_imm(opcode) \ argument
94 #define auipc_offset(opcode) sign_extend64(auipc_imm(opcode), 31) argument
96 #define auipc_offset(opcode) auipc_imm(opcode) argument
122 (((opcode) >> 15) & 0x1f)
125 (((opcode) >> 20) & 0x1f)
127 #define branch_funct3(opcode) \ argument
128 (((opcode) >> 12) & 0x7)
130 #define branch_imm(opcode) \ argument
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A Dsimulate-insn.h23 bool simulate_auipc(u32 opcode, unsigned long addr, struct pt_regs *regs);
24 bool simulate_branch(u32 opcode, unsigned long addr, struct pt_regs *regs);
25 bool simulate_jal(u32 opcode, unsigned long addr, struct pt_regs *regs);
26 bool simulate_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs);
27 bool simulate_c_j(u32 opcode, unsigned long addr, struct pt_regs *regs);
28 bool simulate_c_jr(u32 opcode, unsigned long addr, struct pt_regs *regs);
29 bool simulate_c_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs);
30 bool simulate_c_bnez(u32 opcode, unsigned long addr, struct pt_regs *regs);
31 bool simulate_c_beqz(u32 opcode, unsigned long addr, struct pt_regs *regs);
/arch/arm64/kernel/probes/
A Dsimulate-insn.c54 int xn = opcode & 0x1f; in check_cbz()
62 int xn = opcode & 0x1f; in check_cbnz()
70 int xn = opcode & 0x1f; in check_tbz()
71 int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f); in check_tbz()
78 int xn = opcode & 0x1f; in check_tbnz()
79 int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f); in check_tbnz()
92 xn = opcode & 0x1f; in simulate_adr_adrp()
93 imm = ((opcode >> 3) & 0x1ffffc) | ((opcode >> 29) & 0x3); in simulate_adr_adrp()
95 if (opcode & 0x80000000) in simulate_adr_adrp()
111 if (opcode & (1 << 31)) in simulate_b_bl()
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A Dsimulate-insn.h11 void simulate_adr_adrp(u32 opcode, long addr, struct pt_regs *regs);
12 void simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs);
13 void simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs);
14 void simulate_br_blr_ret(u32 opcode, long addr, struct pt_regs *regs);
15 void simulate_cbz_cbnz(u32 opcode, long addr, struct pt_regs *regs);
16 void simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs);
17 void simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs);
18 void simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs);
19 void simulate_nop(u32 opcode, long addr, struct pt_regs *regs);
/arch/csky/kernel/probes/
A Dsimulate-insn.c135 unsigned long tmp = opcode & 0x1f; in simulate_jmp32()
157 unsigned long tmp = opcode & 0x1f; in simulate_jsr32()
173 tmp = (opcode & 0xe0) >> 5; in simulate_lrw16()
204 if (opcode & 0x10) { in simulate_pop16()
225 if (opcode & 0x100000) { in simulate_pop32()
235 if (opcode & 0x1000000) { in simulate_pop32()
248 unsigned long tmp = opcode & 0x1f; in simulate_bez32()
262 unsigned long tmp = opcode & 0x1f; in simulate_bnez32()
276 unsigned long tmp = opcode & 0x1f; in simulate_bnezad32()
295 unsigned long tmp = opcode & 0x1f; in simulate_bhsz32()
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/arch/x86/mm/
A Dpf_in.c112 *opcode = *addr; in get_opcode()
129 unsigned int opcode; in get_ins_type() local
150 unsigned int opcode; in get_ins_reg_width() local
160 if (rw8[i] == opcode) in get_ins_reg_width()
164 if (rw32[i] == opcode) in get_ins_reg_width()
173 unsigned int opcode; in get_ins_mem_width() local
183 if (mw8[i] == opcode) in get_ins_mem_width()
187 if (mw16[i] == opcode) in get_ins_mem_width()
396 unsigned int opcode; in get_ins_reg_val() local
419 if (opcode == 0xAA || opcode == 0xAB) { in get_ins_reg_val()
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/arch/powerpc/xmon/
A Dppc-dis.c83 const struct powerpc_opcode *opcode; in lookup_powerpc() local
88 for (opcode = powerpc_opcodes; opcode < opcode_end; ++opcode) in lookup_powerpc()
94 if ((insn & opcode->mask) != opcode->opcode in lookup_powerpc()
111 return opcode; in lookup_powerpc()
121 const struct powerpc_opcode *opcode; in print_insn_powerpc() local
142 opcode = NULL; in print_insn_powerpc()
145 if (opcode == NULL) in print_insn_powerpc()
150 if (opcode != NULL) in print_insn_powerpc()
158 if (opcode->operands[0] != 0) in print_insn_powerpc()
159 printf("%-7s ", opcode->name); in print_insn_powerpc()
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/arch/riscv/include/asm/
A Dinsn-def.h32 .macro insn_r, opcode, func3, func7, rd, rs1, rs2
33 .insn r \opcode, \func3, \func7, \rd, \rs1, \rs2
36 .macro insn_i, opcode, func3, rd, rs1, simm12
37 .insn i \opcode, \func3, \rd, \rs1, \simm12
40 .macro insn_s, opcode, func3, rs2, simm12, rs1
41 .insn s \opcode, \func3, \rs2, \simm12(\rs1)
49 .4byte ((\opcode << INSN_R_OPCODE_SHIFT) | \
57 .macro insn_i, opcode, func3, rd, rs1, simm12
58 .4byte ((\opcode << INSN_I_OPCODE_SHIFT) | \
65 .macro insn_s, opcode, func3, rs2, simm12, rs1
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/arch/x86/include/asm/
A Dtext-patching.h16 extern void text_poke_early(void *addr, const void *opcode, size_t len);
34 extern void *text_poke(void *addr, const void *opcode, size_t len);
36 extern void *text_poke_kgdb(void *addr, const void *opcode, size_t len);
37 extern void *text_poke_copy(void *addr, const void *opcode, size_t len);
64 static __always_inline int text_opcode_size(u8 opcode) in text_opcode_size() argument
71 switch(opcode) { in text_opcode_size()
87 u8 opcode; member
97 BUG_ON(size < text_opcode_size(opcode)); in __text_gen_insn()
108 insn->opcode = opcode; in __text_gen_insn()
123 void *text_gen_insn(u8 opcode, const void *addr, const void *dest) in text_gen_insn() argument
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/arch/sh/kernel/
A Dkprobes.c48 p->opcode = opcode; in arch_prepare_kprobe()
62 *p->addr = p->opcode; in arch_disarm_kprobe()
104 saved->opcode = 0; in arch_remove_kprobe()
111 saved->opcode = 0; in arch_remove_kprobe()
151 if (OPCODE_JSR(p->opcode) || OPCODE_JMP(p->opcode)) { in prepare_singlestep()
154 } else if (OPCODE_BRA(p->opcode) || OPCODE_BSR(p->opcode)) { in prepare_singlestep()
159 } else if (OPCODE_BRAF(p->opcode) || OPCODE_BSRF(p->opcode)) { in prepare_singlestep()
168 } else if (OPCODE_BF(p->opcode) || OPCODE_BT(p->opcode)) { in prepare_singlestep()
178 } else if (OPCODE_BF_S(p->opcode) || OPCODE_BT_S(p->opcode)) { in prepare_singlestep()
325 p->opcode = 0; in post_kprobe_handler()
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/arch/powerpc/include/asm/
A Dtrace.h81 TP_ARGS(opcode, args),
86 __field(unsigned long, opcode)
90 __entry->opcode = opcode;
102 TP_ARGS(opcode, retval, retbuf),
107 __field(unsigned long, opcode)
112 __entry->opcode = opcode;
233 TP_ARGS(opcode, args),
236 __field(unsigned long, opcode)
240 __entry->opcode = opcode;
252 TP_ARGS(opcode, retval),
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/arch/arm64/kernel/pi/
A Dpatch-scs.c103 c = *(*opcode)++; in skip_xleb128()
156 const u8 *opcode = frame->opcodes; in scs_handle_fde_frame() local
161 opcode = frame->opcodes64; in scs_handle_fde_frame()
166 if (*opcode & BIT(7)) in scs_handle_fde_frame()
169 l = *opcode++; in scs_handle_fde_frame()
170 opcode += l; in scs_handle_fde_frame()
178 switch (*opcode++) { in scs_handle_fde_frame()
185 loc += *opcode++ * code_alignment_factor; in scs_handle_fde_frame()
190 loc += *opcode++ * code_alignment_factor; in scs_handle_fde_frame()
197 size = skip_xleb128(&opcode, size); in scs_handle_fde_frame()
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/arch/s390/tools/
A Dgen_opcode_table.c24 char opcode[STRING_SIZE_MAX]; member
35 char opcode[2]; member
246 char *opcode; in print_opcode() local
248 opcode = insn->opcode; in print_opcode()
250 opcode += 2; in print_opcode()
266 if (group && (!strncmp(group->opcode, insn->opcode, 2) || group->type->byte == 0)) { in add_to_group()
275 memcpy(group->opcode, insn->opcode, 2); in add_to_group()
283 return strcmp(((struct insn *)a)->opcode, ((struct insn *)b)->opcode); in cmpopcode()
288 char opcode[2] = ""; in print_opcode_table() local
300 if (strncmp(opcode, insn->opcode, 2)) { in print_opcode_table()
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/arch/mips/include/uapi/asm/
A Dinst.h654 __BITFIELD_FIELD(unsigned int opcode : 6,
662 __BITFIELD_FIELD(unsigned int opcode : 6,
670 __BITFIELD_FIELD(unsigned int opcode : 6,
679 __BITFIELD_FIELD(unsigned int opcode : 6,
689 __BITFIELD_FIELD(unsigned int opcode : 6,
699 __BITFIELD_FIELD(unsigned int opcode : 6,
711 __BITFIELD_FIELD(unsigned int opcode : 6,
719 __BITFIELD_FIELD(unsigned int opcode : 6,
729 __BITFIELD_FIELD(unsigned int opcode : 6,
740 __BITFIELD_FIELD(unsigned int opcode : 6,
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/arch/x86/lib/
A Dinat.c13 insn_attr_t inat_get_opcode_attribute(insn_byte_t opcode) in inat_get_opcode_attribute() argument
15 return inat_primary_table[opcode]; in inat_get_opcode_attribute()
26 insn_attr_t inat_get_escape_attribute(insn_byte_t opcode, int lpfx_id, in inat_get_escape_attribute() argument
37 if (inat_has_variant(table[opcode]) && lpfx_id) { in inat_get_escape_attribute()
42 return table[opcode]; in inat_get_escape_attribute()
65 insn_attr_t inat_get_avx_attribute(insn_byte_t opcode, insn_byte_t vex_m, in inat_get_avx_attribute() argument
75 if (!inat_is_group(table[opcode]) && vex_p) { in inat_get_avx_attribute()
81 return table[opcode]; in inat_get_avx_attribute()
/arch/loongarch/include/asm/
A Dinst.h262 unsigned int opcode : 17; member
268 unsigned int opcode : 6; member
274 unsigned int opcode : 7; member
281 unsigned int opcode : 6; member
287 unsigned int opcode : 22; member
294 unsigned int opcode : 17; member
301 unsigned int opcode : 16; member
308 unsigned int opcode : 10; member
315 unsigned int opcode : 8; member
322 unsigned int opcode : 6; member
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/arch/x86/kernel/kprobes/
A Dcore.c142 kprobe_opcode_t opcode; in can_boost() local
150 if (insn->opcode.nbytes == 2) in can_boost()
166 opcode = insn->opcode.bytes[0]; in can_boost()
168 switch (opcode) { in can_boost()
245 buf[0] = kp->opcode; in __recover_probed_insn()
488 switch (p->ainsn.opcode) { in kprobe_emulate_ifmodifiers()
614 insn_byte_t opcode = insn->opcode.bytes[0]; in prepare_emulation() local
616 switch (opcode) { in prepare_emulation()
626 p->ainsn.opcode = opcode; in prepare_emulation()
664 opcode = insn->opcode.bytes[1]; in prepare_emulation()
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/arch/mips/kernel/
A Dtraps.c541 offset = opcode & OFFSET; in simulate_ll()
674 if ((opcode & OPCODE) == SPEC3 && (opcode & FUNC) == RDHWR) { in simulate_rdhwr_normal()
701 if ((opcode & OPCODE) == SPEC0 && (opcode & FUNC) == SYNC) { in simulate_sync()
1118 u32 opcode, tcode = 0; in do_tr() local
1132 if (!(opcode & OPCODE)) in do_tr()
1138 if (!(opcode & OPCODE)) in do_tr()
1159 unsigned int opcode = 0; in do_ri() local
1227 opcode = mmop[0]; in do_ri()
1228 opcode = (opcode << 16) | mmop[1]; in do_ri()
1409 unsigned int opcode; in do_cpu() local
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/arch/x86/events/intel/
A Dp4.c310 .opcode = P4_OPCODE(P4_EVENT_X87_FP_UOP),
318 .opcode = P4_OPCODE(P4_EVENT_TC_MISC),
332 .opcode = P4_OPCODE(P4_EVENT_TC_MS_XFER),
375 .opcode = P4_OPCODE(P4_EVENT_WC_BUFFER),
384 .opcode = P4_OPCODE(P4_EVENT_B2B_CYCLES),
390 .opcode = P4_OPCODE(P4_EVENT_BNR),
396 .opcode = P4_OPCODE(P4_EVENT_SNOOP),
402 .opcode = P4_OPCODE(P4_EVENT_RESPONSE),
456 .opcode = P4_OPCODE(P4_EVENT_UOP_TYPE),
726 esel = P4_OPCODE_ESEL(bind->opcode); in p4_pmu_event_map()
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