| /arch/arm/mm/ |
| A D | cache-uniphier.c | 117 u32 operation) in __uniphier_cache_maint_common() argument
151 writel_relaxed(UNIPHIER_SSCOQM_CE | operation, in __uniphier_cache_maint_common()
155 if (likely(UNIPHIER_SSCOQM_S_IS_RANGE(operation))) { in __uniphier_cache_maint_common()
171 u32 operation) in __uniphier_cache_maint_all() argument
174 UNIPHIER_SSCOQM_S_ALL | operation); in __uniphier_cache_maint_all()
181 u32 operation) in __uniphier_cache_maint_range() argument
195 __uniphier_cache_maint_all(data, operation); in __uniphier_cache_maint_range()
210 UNIPHIER_SSCOQM_S_RANGE | operation); in __uniphier_cache_maint_range()
239 u32 operation) in uniphier_cache_maint_range() argument
247 static void uniphier_cache_maint_all(u32 operation) in uniphier_cache_maint_all() argument
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| A D | Kconfig | 1013 clean operation followed immediately by an invalidate operation,
1019 bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1022 operation (offset 0x7FC). This operation runs in background so that
1026 Invalidate by Way operation. Revisions prior to r3p1 are affected by
1030 bool "PL310 errata: cache sync operation may be faulty"
1034 Under some condition the effect of cache sync operation on
1035 the store buffer still remains when the operation completes.
1038 is to replace the normal offset of cache sync operation (0x730)
1040 This has the same effect as the cache sync operation: store buffer
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| /arch/arm/boot/dts/nxp/imx/ |
| A D | imx6q-cm-fx6.dts | 180 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
182 * 1.2GHz operation point here.
202 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
204 * 1.2GHz operation point here.
224 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
226 * 1.2GHz operation point here.
246 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
248 * 1.2GHz operation point here.
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| A D | imx27-phytec-phycore-som.dtsi | 82 /* SW1A and SW1B joined operation */
90 /* SW2A and SW2B joined operation */
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| /arch/s390/pci/ |
| A D | pci_report.h | 14 int zpci_report_status(struct zpci_dev *zdev, const char *operation, const char *status);
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| A D | pci_report.c | 107 int zpci_report_status(struct zpci_dev *zdev, const char *operation, const char *status) in zpci_report_status() argument
132 buf += scnprintf(buf, end - buf, "report: %s\n", operation); in zpci_report_status()
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| /arch/arm/mach-omap2/ |
| A D | sram242x.S | 38 mov r3, #0x1 @ value for 1x operation
39 str r3, [r2] @ go to L1-freq operation
66 mov r3, #0x2 @ value for 2x operation
67 str r3, [r2] @ go to L0-freq operation
101 orr r5, r5, r9 @ bulld value for L0/L1-volt operation.
196 orr r8, r8, r9 @ bulld value for L0/L1-volt operation.
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| A D | sram243x.S | 38 mov r3, #0x1 @ value for 1x operation
39 str r3, [r2] @ go to L1-freq operation
66 mov r3, #0x2 @ value for 2x operation
67 str r3, [r2] @ go to L0-freq operation
101 orr r5, r5, r9 @ bulld value for L0/L1-volt operation.
196 orr r8, r8, r9 @ bulld value for L0/L1-volt operation.
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| /arch/m68k/fpsp040/ |
| A D | slog2.S | 32 | Step 0. If X < 0, create a NaN and raise the invalid operation
47 | Step 0. If X < 0, create a NaN and raise the invalid operation
61 | Step 0. If X < 0, create a NaN and raise the invalid operation
76 | Step 0. If X < 0, create a NaN and raise the invalid operation
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| A D | sacos.S | 34 | 5. (|X| > 1) Generate an invalid operation by 0 * infinity.
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| A D | bindec.S | 37 | The operation in A3 above may have set INEX2.
62 | The operation in A3 above may have set INEX2.
63 | RZ mode is forced for the scaling operation to insure
78 | Perform FINT operation in the user's rounding mode.
86 | If the int operation results in more than LEN digits,
263 | The operation in A3 above may have set INEX2.
607 | If the int operation results in more than LEN digits,
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| A D | sasin.S | 34 | 5. (|X| > 1) Generate an invalid operation by 0 * infinity.
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| A D | satanh.S | 41 | 5. (|X| > 1) Generate an invalid operation by 0 * infinity.
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| A D | decbin.S | 28 | Note: this operation can never overflow.
34 | Note: this operation can never overflow.
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| /arch/csky/kernel/ |
| A D | smp.c | 89 send_ipi_message(const struct cpumask *to_whom, enum ipi_message_type operation) in send_ipi_message() argument
94 set_bit(operation, &per_cpu_ptr(&ipi_data, i)->bits); in send_ipi_message()
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| /arch/arm64/boot/dts/ti/ |
| A D | k3-j784s4-j742s2-evm-usb0-type-a.dtso | 4 * Host Mode of operation with the Type-A Connector.
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| /arch/m68k/hp300/ |
| A D | README.hp300 | 13 every packet. This doesn't make for very speedy operation.
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| /arch/loongarch/include/asm/ |
| A D | percpu.h | 128 #define _pcp_protect(operation, pcp, val) \ argument
132 __retval = (typeof(pcp))operation(raw_cpu_ptr(&(pcp)), \
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| /arch/x86/include/asm/ |
| A D | sev-common.h | 169 operation : 4, member
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| /arch/arm64/boot/dts/marvell/ |
| A D | ac5x-rd-carrier.dtsi | 20 * modes of operation.
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| A D | ac5x-rd-carrier-cn9131.dts | 7 * This specific carrier board in this mode of operation (external)
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| /arch/xtensa/ |
| A D | Kconfig.debug | 29 Correct operation of this instruction requires some cooperation from hardware
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| /arch/s390/include/uapi/asm/ |
| A D | dasd.h | 250 unsigned char operation:3; /* cache operation mode */ member
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| /arch/powerpc/include/asm/ |
| A D | plpar_wrappers.h | 77 unsigned long operation, unsigned long param1, in htm_call() argument
80 return plpar_hcall_norets(H_HTM, flags, target, operation, in htm_call()
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| /arch/alpha/kernel/ |
| A D | smp.c | 497 send_ipi_message(const struct cpumask *to_whom, enum ipi_message_type operation) in send_ipi_message() argument
503 set_bit(operation, &ipi_data[i].bits); in send_ipi_message()
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