Home
last modified time | relevance | path

Searched refs:phy (Results 1 – 25 of 1630) sorted by relevance

12345678910>>...66

/arch/arm64/boot/dts/microchip/
A Dsparx5_pcb135_board.dtsi202 phy0: ethernet-phy@0 {
205 phy1: ethernet-phy@1 {
208 phy2: ethernet-phy@2 {
211 phy3: ethernet-phy@3 {
214 phy4: ethernet-phy@4 {
217 phy5: ethernet-phy@5 {
220 phy6: ethernet-phy@6 {
223 phy7: ethernet-phy@7 {
226 phy8: ethernet-phy@8 {
229 phy9: ethernet-phy@9 {
[all …]
/arch/arm64/boot/dts/freescale/
A Dfsl-ls2088a-rdb.dts27 phy-handle = <&mdio1_phy1>;
32 phy-handle = <&mdio1_phy2>;
37 phy-handle = <&mdio1_phy3>;
42 phy-handle = <&mdio1_phy4>;
47 phy-handle = <&mdio2_phy1>;
52 phy-handle = <&mdio2_phy2>;
57 phy-handle = <&mdio2_phy3>;
94 compatible = "ethernet-phy-id03a1.b4b0", "ethernet-phy-ieee802.3-c45";
100 compatible = "ethernet-phy-id03a1.b4b0", "ethernet-phy-ieee802.3-c45";
106 compatible = "ethernet-phy-id03a1.b4b0", "ethernet-phy-ieee802.3-c45";
[all …]
A Dtqmls104xa-mbls10xxa-fman.dtsi21 phy-handle = <&rgmii_phy1>;
22 phy-connection-type = "rgmii";
23 phy-mode = "rgmii-id";
28 phy-handle = <&rgmii_phy2>;
29 phy-connection-type = "rgmii";
30 phy-mode = "rgmii-id";
49 qsgmii2_phy1: ethernet-phy@0 {
54 qsgmii2_phy2: ethernet-phy@1 {
59 qsgmii2_phy3: ethernet-phy@2 {
69 rgmii_phy2: ethernet-phy@c {
[all …]
A Dfsl-lx2160a-bluebox3.dts57 phy-handle = <&aqr113c_phy1>;
58 phy-mode = "usxgmii";
63 phy-handle = <&aqr113c_phy2>;
64 phy-mode = "usxgmii";
70 phy-mode = "usxgmii";
76 phy-mode = "usxgmii";
81 phy-mode = "rgmii";
91 phy-mode = "rgmii";
377 phy-mode = "sgmii";
408 phy-mode = "sgmii";
[all …]
A Dfsl-ls2080a-rdb.dts29 phy-handle = <&mdio2_phy1>;
34 phy-handle = <&mdio2_phy2>;
39 phy-handle = <&mdio2_phy3>;
44 phy-handle = <&mdio2_phy4>;
52 mdio1_phy1: emdio1-phy@10 {
56 mdio1_phy2: emdio1-phy@11 {
60 mdio1_phy3: emdio1-phy@12 {
71 mdio2_phy1: emdio2-phy@0 {
77 mdio2_phy2: emdio2-phy@1 {
83 mdio2_phy3: emdio2-phy@2 {
[all …]
A Dfsl-ls1028a-qds-13bb.dtso19 slot1_sgmii: ethernet-phy@2 {
27 phy-handle = <&slot1_sgmii>;
28 phy-mode = "usxgmii";
38 slot2_qxgmii0: ethernet-phy@0 {
43 slot2_qxgmii1: ethernet-phy@1 {
48 slot2_qxgmii2: ethernet-phy@2 {
53 slot2_qxgmii3: ethernet-phy@3 {
63 phy-mode = "usxgmii";
70 phy-mode = "usxgmii";
77 phy-mode = "usxgmii";
[all …]
A Dfsl-ls1028a-qds-7777.dtso20 slot1_sxgmii0: ethernet-phy@0 {
25 slot1_sxgmii1: ethernet-phy@1 {
30 slot1_sxgmii2: ethernet-phy@2 {
35 slot1_sxgmii3: ethernet-phy@3 {
44 phy-handle = <&slot1_sxgmii0>;
45 phy-mode = "2500base-x";
50 phy-handle = <&slot1_sxgmii1>;
51 phy-mode = "2500base-x";
56 phy-handle = <&slot1_sxgmii2>;
57 phy-mode = "2500base-x";
[all …]
A Dfsl-ls1028a-qds-65bb.dtso18 slot1_sgmii: ethernet-phy@2 {
26 phy-handle = <&slot1_sgmii>;
27 phy-mode = "2500base-x";
36 slot2_qsgmii0: ethernet-phy@8 {
40 slot2_qsgmii1: ethernet-phy@9 {
44 slot2_qsgmii2: ethernet-phy@a {
48 slot2_qsgmii3: ethernet-phy@b {
57 phy-mode = "qsgmii";
64 phy-mode = "qsgmii";
71 phy-mode = "qsgmii";
[all …]
A Dtqmls1088a-mbls10xxa-mc.dtsi59 qsgmii2_phy1: ethernet-phy@0 {
60 compatible = "ethernet-phy-ieee802.3-c22";
64 qsgmii2_phy2: ethernet-phy@1 {
69 qsgmii2_phy3: ethernet-phy@2 {
74 qsgmii2_phy4: ethernet-phy@3 {
79 rgmii_phy2: ethernet-phy@c {
87 rgmii_phy1: ethernet-phy@e {
95 qsgmii1_phy1: ethernet-phy@1c {
100 qsgmii1_phy2: ethernet-phy@1d {
105 qsgmii1_phy3: ethernet-phy@1e {
[all …]
A Dfsl-ls1028a-qds-85bb.dtso18 slot1_sgmii: ethernet-phy@1c {
25 phy-handle = <&slot1_sgmii>;
26 phy-mode = "sgmii";
36 slot2_qsgmii0: ethernet-phy@8 {
40 slot2_qsgmii1: ethernet-phy@9 {
44 slot2_qsgmii2: ethernet-phy@a {
48 slot2_qsgmii3: ethernet-phy@b {
57 phy-mode = "qsgmii";
64 phy-mode = "qsgmii";
71 phy-mode = "qsgmii";
[all …]
A Dfsl-lx2162a-clearfog.dts117 phy-handle = <&ethernet_phy3>;
118 phy-connection-type = "sgmii";
124 phy-handle = <&ethernet_phy1>;
125 phy-connection-type = "sgmii";
131 phy-handle = <&ethernet_phy6>;
132 phy-connection-type = "sgmii";
138 phy-handle = <&ethernet_phy8>;
139 phy-connection-type = "sgmii";
145 phy-handle = <&ethernet_phy4>;
146 phy-connection-type = "sgmii";
[all …]
A Dfsl-ls1088a-rdb.dts27 phy-handle = <&mdio1_phy5>;
28 phy-connection-type = "qsgmii";
34 phy-handle = <&mdio1_phy6>;
41 phy-handle = <&mdio1_phy7>;
48 phy-handle = <&mdio1_phy8>;
55 phy-handle = <&mdio1_phy1>;
62 phy-handle = <&mdio1_phy2>;
69 phy-handle = <&mdio1_phy3>;
76 phy-handle = <&mdio1_phy4>;
85 mdio1_phy5: ethernet-phy@c {
[all …]
A Dfsl-ls1028a-qds-9999.dtso19 slot1_sgmii0: ethernet-phy@1c {
23 slot1_sgmii1: ethernet-phy@1d {
27 slot1_sgmii2: ethernet-phy@1e {
31 slot1_sgmii3: ethernet-phy@1f {
39 phy-handle = <&slot1_sgmii0>;
40 phy-mode = "sgmii";
46 phy-handle = <&slot1_sgmii1>;
47 phy-mode = "sgmii";
53 phy-handle = <&slot1_sgmii2>;
54 phy-mode = "sgmii";
[all …]
/arch/mips/boot/dts/realtek/
A Dcameo-rtl9302c-2x-rtl8224-2xge.dts77 phy0: ethernet-phy@0 {
81 phy1: ethernet-phy@1 {
85 phy2: ethernet-phy@2 {
89 phy3: ethernet-phy@3 {
97 phy4: ethernet-phy@0 {
101 phy5: ethernet-phy@1 {
105 phy6: ethernet-phy@2 {
109 phy7: ethernet-phy@3 {
122 phy-handle = <&phy0>;
123 phy-mode = "usxgmii";
[all …]
/arch/mips/boot/dts/mscc/
A Docelot_pcb120.dts8 #include <dt-bindings/phy/phy-ocelot-serdes.h>
45 phy7: ethernet-phy@0 {
51 phy6: ethernet-phy@1 {
57 phy5: ethernet-phy@2 {
73 phy-handle = <&phy0>;
79 phy-handle = <&phy1>;
85 phy-handle = <&phy2>;
98 phy-mode = "sgmii";
105 phy-mode = "sgmii";
112 phy-mode = "sgmii";
[all …]
/arch/powerpc/boot/dts/fsl/
A Dt4240qds.dts166 phy1: ethernet-phy@0 {
170 phy2: ethernet-phy@1 {
174 phy3: ethernet-phy@2 {
178 phy4: ethernet-phy@3 {
205 phy5: ethernet-phy@4 {
209 phy6: ethernet-phy@5 {
480 phy-handle = <&phy5>;
485 phy-handle = <&phy6>;
490 phy-handle = <&phy7>;
495 phy-handle = <&phy8>;
[all …]
A Dt2081qds.dts59 phy-connection-type = "sgmii";
64 phy-connection-type = "sgmii";
68 phy-handle = <&rgmii_phy1>;
69 phy-connection-type = "rgmii";
73 phy-handle = <&rgmii_phy2>;
74 phy-connection-type = "rgmii";
79 phy-connection-type = "sgmii";
84 phy-connection-type = "sgmii";
89 phy-connection-type = "xgmii";
113 rgmii_phy1: ethernet-phy@1 {
[all …]
A Dt2080qds.dts67 phy-connection-type = "xgmii";
72 phy-connection-type = "xgmii";
76 phy-handle = <&rgmii_phy1>;
77 phy-connection-type = "rgmii";
81 phy-handle = <&rgmii_phy2>;
82 phy-connection-type = "rgmii";
87 phy-connection-type = "sgmii";
92 phy-connection-type = "sgmii";
97 phy-connection-type = "xgmii";
128 rgmii_phy1: ethernet-phy@1 {
[all …]
A Dt1040rdb.dts120 phy-handle = <&phy_qsgmii_0>;
121 phy-mode = "qsgmii";
128 phy-handle = <&phy_qsgmii_1>;
129 phy-mode = "qsgmii";
136 phy-handle = <&phy_qsgmii_2>;
137 phy-mode = "qsgmii";
145 phy-mode = "qsgmii";
153 phy-mode = "qsgmii";
161 phy-mode = "qsgmii";
169 phy-mode = "qsgmii";
[all …]
/arch/arm/boot/dts/microchip/
A Dlan966x-pcb8290.dts11 #include "dt-bindings/phy/phy-lan966x-serdes.h"
59 ext_phy0: ethernet-phy@7 {
66 ext_phy1: ethernet-phy@8 {
119 phy-mode = "qsgmii";
127 phy-mode = "qsgmii";
135 phy-mode = "qsgmii";
143 phy-mode = "qsgmii";
151 phy-mode = "qsgmii";
159 phy-mode = "qsgmii";
167 phy-mode = "qsgmii";
[all …]
/arch/arm/boot/dts/marvell/
A Darmada-385-clearfog-gtr-l8.dts36 phy-handle = <&switch0phy0>;
42 phy-handle = <&switch0phy1>;
48 phy-handle = <&switch0phy2>;
54 phy-handle = <&switch0phy3>;
60 phy-handle = <&switch0phy4>;
66 phy-handle = <&switch0phy5>;
72 phy-handle = <&switch0phy6>;
78 phy-handle = <&switch0phy7>;
84 phy-mode = "sgmii";
91 phy-mode = "2500base-x";
[all …]
A Darmada-381-netgear-gs110emx.dts63 phy-mode = "rgmii-id";
94 switch0phy1: ethernet-phy@1 {
98 switch0phy2: ethernet-phy@2 {
102 switch0phy3: ethernet-phy@3 {
132 phy1: ethernet-phy@b {
137 phy2: ethernet-phy@c {
149 phy-mode = "rgmii";
210 phy-handle = <&phy1>;
211 phy-mode = "xaui";
218 phy-handle = <&phy2>;
[all …]
/arch/arm64/boot/dts/ti/
A Dk3-j784s4-evm-quad-port-eth-exp1.dtso18 #include <dt-bindings/phy/phy-cadence.h>
19 #include <dt-bindings/phy/phy.h>
39 phy-handle = <&cpsw9g_phy1>;
40 phy-mode = "qsgmii";
43 phy-names = "mac", "serdes";
48 phy-handle = <&cpsw9g_phy2>;
49 phy-mode = "qsgmii";
52 phy-names = "mac", "serdes";
58 phy-mode = "qsgmii";
67 phy-mode = "qsgmii";
[all …]
A Dk3-j721e-evm-quad-port-eth-exp.dtso13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/phy/phy-cadence.h>
34 phy-handle = <&cpsw9g_phy0>;
35 phy-mode = "qsgmii";
42 phy-handle = <&cpsw9g_phy1>;
43 phy-mode = "qsgmii";
50 phy-handle = <&cpsw9g_phy2>;
51 phy-mode = "qsgmii";
58 phy-handle = <&cpsw9g_phy3>;
59 phy-mode = "qsgmii";
[all …]
/arch/arm64/boot/dts/marvell/
A Darmada-3720-turris-mox.dts177 phy-mode = "rgmii-id";
178 phy-handle = <&phy1>;
183 phy-mode = "2500base-x";
301 phy1: ethernet-phy@1 {
413 phy-mode = "2500base-x";
420 phy-mode = "2500base-x";
430 phy-mode = "sgmii";
498 phy-mode = "2500base-x";
606 phy-mode = "2500base-x";
624 phy-mode = "sgmii";
[all …]

Completed in 776 milliseconds

12345678910>>...66