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Searched refs:pll (Results 1 – 25 of 364) sorted by relevance

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/arch/mips/ath79/
A Dclock.c99 u32 pll; in ar71xx_clocks_init() local
127 u32 pll; in ar724x_clocks_init() local
254 if (pll & AR934X_SRIF_DPLL2_LOCAL_PLL) { in ar934x_clocks_init()
258 nint = (pll >> AR934X_SRIF_DPLL1_NINT_SHIFT) & in ar934x_clocks_init()
260 nfrac = pll & AR934X_SRIF_DPLL1_NFRAC_MASK; in ar934x_clocks_init()
270 nint = (pll >> AR934X_PLL_CPU_CONFIG_NINT_SHIFT) & in ar934x_clocks_init()
281 if (pll & AR934X_SRIF_DPLL2_LOCAL_PLL) { in ar934x_clocks_init()
285 nint = (pll >> AR934X_SRIF_DPLL1_NINT_SHIFT) & in ar934x_clocks_init()
287 nfrac = pll & AR934X_SRIF_DPLL1_NFRAC_MASK; in ar934x_clocks_init()
297 nint = (pll >> AR934X_PLL_DDR_CONFIG_NINT_SHIFT) & in ar934x_clocks_init()
[all …]
/arch/m68k/q40/
A Dconfig.c39 static int q40_get_rtc_pll(struct rtc_pll_info *pll);
248 pll->pll_ctrl = 0; in q40_get_rtc_pll()
249 pll->pll_value = tmp & Q40_RTC_PLL_MASK; in q40_get_rtc_pll()
251 pll->pll_value = -pll->pll_value; in q40_get_rtc_pll()
252 pll->pll_max = 31; in q40_get_rtc_pll()
253 pll->pll_min = -31; in q40_get_rtc_pll()
254 pll->pll_posmult = 512; in q40_get_rtc_pll()
255 pll->pll_negmult = 256; in q40_get_rtc_pll()
256 pll->pll_clock = 125829120; in q40_get_rtc_pll()
263 if (!pll->pll_ctrl) { in q40_set_rtc_pll()
[all …]
/arch/m68k/kernel/
A Dtime.c109 struct rtc_pll_info pll; in rtc_ioctl() local
114 if (!mach_get_rtc_pll || mach_get_rtc_pll(&pll)) in rtc_ioctl()
116 return copy_to_user(argp, &pll, sizeof pll) ? -EFAULT : 0; in rtc_ioctl()
123 if (copy_from_user(&pll, argp, sizeof(pll))) in rtc_ioctl()
125 return mach_set_rtc_pll(&pll); in rtc_ioctl()
/arch/mips/boot/dts/qca/
A Dar9132.dtsi17 clocks = <&pll ATH79_CLK_CPU>;
64 clocks = <&pll ATH79_CLK_AHB>;
89 pll: pll-controller@18050000 { label
90 compatible = "qca,ar9132-pll",
91 "qca,ar9130-pll";
107 clocks = <&pll ATH79_CLK_AHB>;
151 clocks = <&pll ATH79_CLK_AHB>;
A Dar9331.dtsi17 clocks = <&pll ATH79_CLK_CPU>;
90 pll: pll-controller@18050000 { label
91 compatible = "qca,ar9330-pll";
126 clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
141 clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
280 clocks = <&pll ATH79_CLK_AHB>;
/arch/arm64/boot/dts/qcom/
A Dsa8295p-adp.dts380 vdda-pll-supply = <&vreg_l3g>;
402 vdda-pll-supply = <&vreg_l3g>;
428 vdda-pll-supply = <&vreg_l3g>;
450 vdda-pll-supply = <&vreg_l3g>;
472 vdda-pll-supply = <&vreg_l3g>;
494 vdda-pll-supply = <&vreg_l3g>;
511 vdda-pll-supply = <&vreg_l3a>;
530 vdda-pll-supply = <&vreg_l3a>;
547 vdda-pll-supply = <&vreg_l3a>;
564 vdda-pll-supply = <&vreg_l3a>;
[all …]
A Dsc8180x-lenovo-flex-5g.dts482 vdda-pll-supply = <&vreg_l3c_1p2>;
559 vdda-pll-supply = <&vreg_l3c_1p2>;
569 vdda-pll-supply = <&vreg_l5e_0p88>;
577 vdda-pll-supply = <&vreg_l5e_0p88>;
586 vdda-pll-supply = <&vreg_l5e_0p88>;
593 vdda-pll-supply = <&vreg_l5e_0p88>;
599 vdda-pll-supply = <&vreg_l5e_0p88>;
608 vdda-pll-supply = <&vreg_l5e_0p88>;
640 vdda-pll-supply = <&vreg_l5e_0p88>;
649 vdda-pll-supply = <&vreg_l5e_0p88>;
A Dipq8074-hk01.dts104 vdda-pll-supply = <&vreg_dummy>;
110 vdda-pll-supply = <&vreg_dummy>;
A Dsc8180x-primus.dts576 vdda-pll-supply = <&vreg_l3c_1p2>;
651 vdda-pll-supply = <&vreg_l3c_1p2>;
661 vdda-pll-supply = <&vreg_l5e_0p88>;
669 vdda-pll-supply = <&vreg_l5e_0p88>;
678 vdda-pll-supply = <&vreg_l5e_0p88>;
685 vdda-pll-supply = <&vreg_l5e_0p88>;
691 vdda-pll-supply = <&vreg_l5e_0p88>;
700 vdda-pll-supply = <&vreg_l5e_0p88>;
728 vdda-pll-supply = <&vreg_l5e_0p88>;
737 vdda-pll-supply = <&vreg_l5e_0p88>;
A Dsm8350-microsoft-surface-duo2.dts339 vdda-pll-supply = <&vreg_l6b_1p2>;
353 vdda-pll-supply = <&vreg_l5b_0p88>;
362 vdda-pll-supply = <&vreg_l1b_0p88>;
372 vdda-pll-supply = <&vreg_l5b_0p88>;
381 vdda-pll-supply = <&vreg_l5b_0p88>;
A Dsm8350-mtp.dts335 vdda-pll-supply = <&vreg_l6b_1p2>;
349 vdda-pll-supply = <&vreg_l5b_0p88>;
358 vdda-pll-supply = <&vreg_l1b_0p88>;
368 vdda-pll-supply = <&vreg_l5b_0p88>;
377 vdda-pll-supply = <&vreg_l5b_0p88>;
/arch/arm/boot/dts/ti/keystone/
A Dkeystone-k2e-clocks.dtsi11 compatible = "ti,keystone,main-pll-clock";
19 compatible = "ti,keystone,pll-clock";
28 compatible = "ti,keystone,pll-clock";
30 clock-output-names = "ddr-3a-pll-clk";
A Dkeystone-k2l-clocks.dtsi11 compatible = "ti,keystone,pll-clock";
13 clock-output-names = "arm-pll-clk";
20 compatible = "ti,keystone,main-pll-clock";
28 compatible = "ti,keystone,pll-clock";
37 compatible = "ti,keystone,pll-clock";
39 clock-output-names = "ddr-3a-pll-clk";
A Dkeystone-k2hk-clocks.dtsi11 compatible = "ti,keystone,pll-clock";
13 clock-output-names = "arm-pll-clk";
20 compatible = "ti,keystone,main-pll-clock";
28 compatible = "ti,keystone,pll-clock";
37 compatible = "ti,keystone,pll-clock";
39 clock-output-names = "ddr-3a-pll-clk";
46 compatible = "ti,keystone,pll-clock";
48 clock-output-names = "ddr-3b-pll-clk";
/arch/arm/boot/dts/vt8500/
A Dwm8850.dtsi91 compatible = "wm,wm8850-pll-clock";
98 compatible = "wm,wm8850-pll-clock";
105 compatible = "wm,wm8850-pll-clock";
112 compatible = "wm,wm8850-pll-clock";
119 compatible = "wm,wm8850-pll-clock";
126 compatible = "wm,wm8850-pll-clock";
133 compatible = "wm,wm8850-pll-clock";
A Dwm8650.dtsi88 compatible = "wm,wm8650-pll-clock";
95 compatible = "wm,wm8650-pll-clock";
102 compatible = "wm,wm8650-pll-clock";
109 compatible = "wm,wm8650-pll-clock";
116 compatible = "wm,wm8650-pll-clock";
A Dwm8750.dtsi94 compatible = "wm,wm8750-pll-clock";
101 compatible = "wm,wm8750-pll-clock";
108 compatible = "wm,wm8750-pll-clock";
115 compatible = "wm,wm8750-pll-clock";
122 compatible = "wm,wm8750-pll-clock";
A Dwm8505.dtsi91 compatible = "via,vt8500-pll-clock";
98 compatible = "via,vt8500-pll-clock";
105 compatible = "via,vt8500-pll-clock";
112 compatible = "via,vt8500-pll-clock";
/arch/arm64/boot/dts/sprd/
A Dsc9860.dtsi194 pll: pll { label
195 compatible = "sprd,sc9860-pll";
204 clocks = <&ext_26m>, <&pll 0>,
212 clocks = <&ext_26m>, <&pll 0>,
234 clocks = <&ext_26m>, <&pll 0>;
248 clocks = <&pll 0>;
255 clocks = <&ext_26m>, <&pll 0>;
269 clocks = <&ext_26m>, <&pll 0>;
283 clocks = <&ext_26m>, <&pll 0>;
/arch/arm/boot/dts/marvell/
A Ddove-cubox.dts102 silabs,pll-source = <0 0>, <1 0>;
109 silabs,pll-master;
117 silabs,pll-master;
/arch/alpha/include/asm/
A Dcore_marvel.h269 #define IO7_PLL_RNGA(pll) (((pll) >> 3) & 0x7) argument
270 #define IO7_PLL_RNGB(pll) (((pll) >> 6) & 0x7) argument
/arch/arm/boot/dts/st/
A Dstih407-clock.dtsi34 clockgen_a9_pll: clockgen-a9-pll {
68 clk_s_a0_pll: clk-s-a0-pll {
105 compatible = "st,quadfs-pll";
A Dstih410-clock.dtsi37 clockgen_a9_pll: clockgen-a9-pll {
73 clk_s_a0_pll: clk-s-a0-pll {
110 compatible = "st,quadfs-pll";
A Dstih418-clock.dtsi37 clockgen_a9_pll: clockgen-a9-pll {
73 clk_s_a0_pll: clk-s-a0-pll {
110 compatible = "st,quadfs-pll";
/arch/arm/boot/dts/nvidia/
A Dtegra124-nyan.dtsi41 pll-supply = <&vdd_hdmi_pll>;
53 vdd-hdmi-dp-pll-supply = <&vdd_hdmi_pll>;
416 avdd-pll-utmip-supply = <&vddio_1v8>;
417 avdd-pll-erefe-supply = <&avdd_1v05_run>;
418 avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
420 hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
428 avdd-pll-utmip-supply = <&vddio_1v8>;
429 avdd-pll-erefe-supply = <&avdd_1v05_run>;
430 avdd-pex-pll-supply = <&vdd_1v05_run>;
431 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;

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