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Searched refs:pll_base (Results 1 – 3 of 3) sorted by relevance

/arch/mips/ath79/
A Dclock.c621 void __iomem *pll_base; in ath79_clocks_init_dt() local
627 pll_base = of_iomap(np, 0); in ath79_clocks_init_dt()
628 if (!pll_base) { in ath79_clocks_init_dt()
634 ar71xx_clocks_init(pll_base); in ath79_clocks_init_dt()
637 ar724x_clocks_init(pll_base); in ath79_clocks_init_dt()
639 ar933x_clocks_init(pll_base); in ath79_clocks_init_dt()
641 ar934x_clocks_init(pll_base); in ath79_clocks_init_dt()
643 qca953x_clocks_init(pll_base); in ath79_clocks_init_dt()
645 qca955x_clocks_init(pll_base); in ath79_clocks_init_dt()
647 qca956x_clocks_init(pll_base); in ath79_clocks_init_dt()
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/arch/arm/mach-tegra/
A Dsleep-tegra20.S57 .macro store_pll_state, rd, tmp, r_car_base, pll_base, pll_mask
58 ldr \rd, [\r_car_base, #\pll_base]
67 .macro pll_enable, rd, r_car_base, pll_base, test_mask
71 ldr \rd, [\r_car_base, #\pll_base]
74 streq \rd, [\r_car_base, #\pll_base]
A Dsleep-tegra30.S104 .macro store_pll_state, rd, tmp, r_car_base, pll_base, pll_mask
105 ldr \rd, [\r_car_base, #\pll_base]
132 .macro pll_enable, rd, r_car_base, pll_base, pll_misc, test_mask
136 ldr \rd, [\r_car_base, #\pll_base]
139 streq \rd, [\r_car_base, #\pll_base]
153 .macro pll_locked, rd, r_car_base, pll_base, test_mask
157 ldr \rd, [\r_car_base, #\pll_base]

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