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/arch/loongarch/kernel/
A Dsetup.c573 int i, possible; in prefill_possible_map() local
575 possible = num_processors + disabled_cpus; in prefill_possible_map()
576 if (possible > nr_cpu_ids) in prefill_possible_map()
577 possible = nr_cpu_ids; in prefill_possible_map()
580 possible, max((possible - num_processors), 0)); in prefill_possible_map()
582 for (i = 0; i < possible; i++) in prefill_possible_map()
589 set_nr_cpu_ids(possible); in prefill_possible_map()
/arch/x86/kernel/cpu/
A Dtopology.c430 unsigned int possible = nr_cpu_ids; in topology_apply_cmdline_limits_early() local
434 possible = 1; in topology_apply_cmdline_limits_early()
437 possible = min_t(unsigned int, max_possible_cpus, possible); in topology_apply_cmdline_limits_early()
439 if (possible < nr_cpu_ids) { in topology_apply_cmdline_limits_early()
440 pr_info("Limiting to %u possible CPUs\n", possible); in topology_apply_cmdline_limits_early()
441 set_nr_cpu_ids(possible); in topology_apply_cmdline_limits_early()
/arch/mips/kernel/
A Dsetup.c736 int i, possible = num_possible_cpus(); in prefill_possible_map() local
738 if (possible > nr_cpu_ids) in prefill_possible_map()
739 possible = nr_cpu_ids; in prefill_possible_map()
741 for (i = 0; i < possible; i++) in prefill_possible_map()
746 set_nr_cpu_ids(possible); in prefill_possible_map()
/arch/x86/configs/
A Dhardening.config4 # it as a possible target.
/arch/nios2/platform/
A DKconfig.platform133 Maximum possible data cache size.
140 Minimum possible data cache line size.
147 Maximum possible instruction cache size.
/arch/parisc/math-emu/
A DREADME2 been modified as little as possible. Even though they don't fit the
/arch/arm64/boot/dts/xilinx/
A Dzynqmp-zc1254-revA.dts49 spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
A Dzynqmp-zc1751-xm018-dc4.dts181 spi-rx-bus-width = <4>; /* also DUAL configuration possible */
/arch/m68k/fpsp040/
A Dssinh.S108 fmuls (%sp)+,%fp0 |last fp inst - possible exceptions set
131 fmulx (%sp)+,%fp0 |possible exception
A Dx_operr.S175 cmpw #0x3FFE,%d0 |this is the only possible exponent value
202 cmpw #0x3FFE,%d0 |this is the only possible exponent value
321 | It is possible to have either inex2 or inex1 exceptions with the
A Dx_unimp.S69 fsave -(%a7) |capture possible exc state
A Dstan.S247 fdivx %fp1,%fp0 |last inst - possible exception set
287 fdivx (%sp)+,%fp0 |last inst - possible exception set
301 fmovex (%sp)+,%fp0 |last inst - possible exception set
/arch/arm64/boot/dts/qcom/
A Dmsm8916-samsung-e7.dts14 * However, it is possible to use this device tree by compiling an ARM32 kernel
A Dmsm8916-samsung-e5.dts14 * However, it is possible to use this device tree by compiling an ARM32 kernel
A Dmsm8916-samsung-grandmax.dts15 * However, it is possible to use this device tree by compiling an ARM32 kernel
/arch/arm/boot/dts/nxp/imx/
A Dimx6q-cm-fx6.dts180 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
202 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
224 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
246 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
/arch/arm64/boot/dts/freescale/
A Dimx8mp-aristainetos3-helios-lvds.dtso105 * currently it is not possible to let display clocks configure
/arch/s390/kernel/
A Dsmp.c937 unsigned int possible, sclp_max, cpu; in smp_fill_possible_mask() local
942 possible = setup_possible_cpus ?: nr_cpu_ids; in smp_fill_possible_mask()
943 possible = min(possible, sclp_max); in smp_fill_possible_mask()
944 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++) in smp_fill_possible_mask()
/arch/arm64/boot/dts/marvell/
A Darmada-80x0.dtsi103 * level. Because it is not possible as of now
/arch/um/
A DKconfig158 instance, there is much greater flexibility possible than with the
176 possible requests is provided.
196 It is possible to reduce the stack to 1 for 64BIT and 0 for 32BIT on
/arch/arm/boot/dts/allwinner/
A Dsun8i-r16-parrot.dts235 * Remove next line once it is possible to sync two regulators.
246 * Remove next line once it is possible to sync two regulators.
/arch/x86/xen/
A DKconfig41 It is always possible to change the default via specifying the
/arch/powerpc/kernel/
A Dinterrupt_64.S118 stb r11,PACAIRQHAPPENED(r13) # clear out possible HARD_DIS
305 stb r11,PACAIRQHAPPENED(r13) # clear out possible HARD_DIS
438 stb r11,PACAIRQHAPPENED(r13) # clear out possible HARD_DIS
/arch/arm/mach-pxa/
A Dsleep.S108 @ as possible to eliminate messing about with the refresh clock
/arch/arm/nwfpe/
A Dsoftfloat-specialize8 Written by John R. Hauser. This work was made possible in part by the
43 defined here if desired. It is currently not possible for such a trap to

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