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Searched refs:reg2 (Results 1 – 25 of 70) sorted by relevance

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/arch/nios2/include/asm/
A Dasm-macros.h24 and \reg1, \reg1, \reg2
78 .macro BT reg1, reg2, bit
98 BT \reg1, \reg2, \bit
110 BT \reg1, \reg2, \bit
127 xori \reg2, \reg2, (1 << \bit)
130 xorhi \reg2, \reg2, (1 << (\bit - 16))
148 ori \reg2, \reg2, (1 << \bit)
151 orhi \reg2, \reg2, (1 << (\bit - 16))
169 andi \reg2, \reg2, %lo(~(1 << \bit))
172 andhi \reg2, \reg2, %lo(~(1 << (\bit - 16)))
[all …]
/arch/arm64/include/asm/
A Dkvm_ptrauth.h26 .macro ptrauth_save_state base, reg1, reg2
28 mrs_s \reg2, SYS_APIAKEYHI_EL1
31 mrs_s \reg2, SYS_APIBKEYHI_EL1
34 mrs_s \reg2, SYS_APDAKEYHI_EL1
37 mrs_s \reg2, SYS_APDBKEYHI_EL1
40 mrs_s \reg2, SYS_APGAKEYHI_EL1
47 msr_s SYS_APIAKEYHI_EL1, \reg2
50 msr_s SYS_APIBKEYHI_EL1, \reg2
53 msr_s SYS_APDAKEYHI_EL1, \reg2
56 msr_s SYS_APDBKEYHI_EL1, \reg2
[all …]
A Dasm-uaccess.h73 .macro user_ldp l, reg1, reg2, addr, post_inc
75 8889: ldtr \reg2, [\addr, #8];
82 .macro user_stp l, reg1, reg2, addr, post_inc
84 8889: sttr \reg2, [\addr, #8];
/arch/arm/probes/kprobes/
A Dtest-core.h242 TEST_ARG_REG(reg2, val2) \
250 TEST_ARG_REG(reg2, val2) \
259 TEST_ARG_REG(reg2, val2) \
276 TEST_ARG_REG(reg2, val2) \
284 TEST_ARG_PTR(reg2, val2) \
292 TEST_ARG_REG(reg2, val2) \
301 TEST_ARG_PTR(reg2, val2) \
310 TEST_ARG_REG(reg2, val2) \
352 TEST_ARG_REG(reg2, val2) \
354 TEST_BRANCH_F(code1 #reg1 code2 #reg2 code3) \
[all …]
/arch/s390/include/asm/
A Dap.h139 unsigned long reg2; in ap_tapq() local
147 : [reg1] "=&d" (reg1.value), [reg2] "=&d" (reg2) in ap_tapq()
151 info->value = reg2; in ap_tapq()
266 : [reg0] "d" (reg0), [reg2] "d" (reg2) in ap_qci()
320 : [reg0] "d" (reg0), [reg2] "d" (reg2) in ap_aqic()
357 unsigned long reg2; in ap_qact() local
367 : [reg1] "+&d" (reg1.value), [reg2] "=&d" (reg2) in ap_qact()
370 apinfo->val = reg2; in ap_qact()
421 : [reg0] "d" (reg0), [reg2] "d" (reg2) in ap_aapq()
504 unsigned long reg2; in ap_dqap() local
[all …]
A Dprocessor.h341 unsigned int reg1, reg2; in __extract_psw() local
343 asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2)); in __extract_psw()
344 return (((unsigned long) reg1) << 32) | ((unsigned long) reg2); in __extract_psw()
/arch/arm/kernel/
A Dhyp-stub.S31 .macro store_primary_cpu_mode reg1, reg2
34 str_l \reg1, __boot_cpu_mode, \reg2
43 .macro compare_cpu_mode_with_primary mode, reg1, reg2
44 adr_l \reg2, __boot_cpu_mode
45 ldr \reg1, [\reg2]
48 strne \reg1, [\reg2] @ record what happened and give up
53 .macro store_primary_cpu_mode reg1:req, reg2:req
60 .macro compare_cpu_mode_with_primary mode, reg1, reg2
/arch/arm/lib/
A Dcsumpartialcopy.S29 .macro load2b, reg1, reg2
31 ldrb \reg2, [r0], #1
38 .macro load2l, reg1, reg2
40 ldr \reg2, [r0], #4
43 .macro load4l, reg1, reg2, reg3, reg4
44 ldmia r0!, {\reg1, \reg2, \reg3, \reg4}
A Dcopy_from_user.S46 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
48 ldr1w \ptr, \reg2, \abort
53 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
54 ldr4w \ptr, \reg1, \reg2, \reg3, \reg4, \abort
66 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
67 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4})
70 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
71 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
86 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
87 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
A Dmemcpy.S21 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
22 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
25 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
26 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
37 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
38 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
A Dcopy_to_user.S40 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
41 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
44 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
45 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
64 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
66 str1w \ptr, \reg2, \abort
83 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
84 USERL(\abort, stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
A Dcsumpartialcopyuser.S60 .macro load2b, reg1, reg2
62 ldrusr \reg2, r0, 1
69 .macro load2l, reg1, reg2
71 ldrusr \reg2, r0, 4
74 .macro load4l, reg1, reg2, reg3, reg4
76 ldrusr \reg2, r0, 4
/arch/x86/events/intel/
A Duncore_nhmex.c695 if (reg2->idx != EXTRA_REG_NONE && in nhmex_mbox_get_constraint()
697 !nhmex_mbox_get_shared_reg(box, reg2->idx, reg2->config)) in nhmex_mbox_get_constraint()
710 if (reg2->idx != EXTRA_REG_NONE) in nhmex_mbox_get_constraint()
711 reg2->alloc = 1; in nhmex_mbox_get_constraint()
754 if (reg2->alloc) { in nhmex_mbox_put_constraint()
756 reg2->alloc = 0; in nhmex_mbox_put_constraint()
812 reg2->config = ~0ULL; in nhmex_mbox_hw_config()
854 wrmsrq(reg2->reg, 0); in nhmex_mbox_msr_enable_event()
855 if (reg2->config != ~0ULL) { in nhmex_mbox_msr_enable_event()
856 wrmsrq(reg2->reg + 1, in nhmex_mbox_msr_enable_event()
[all …]
/arch/parisc/net/
A Dbpf_jit.h103 #define hppa_or(reg1, reg2, target) \ argument
105 #define hppa_or_cond(reg1, reg2, cond, f, target) \ argument
106 hppa_t6_insn(0x02, reg2, reg1, cond, f, 0x09, target)
107 #define hppa_and(reg1, reg2, target) \ argument
109 #define hppa_and_cond(reg1, reg2, cond, f, target) \ argument
110 hppa_t6_insn(0x02, reg2, reg1, cond, f, 0x08, target)
111 #define hppa_xor(reg1, reg2, target) \ argument
113 #define hppa_add(reg1, reg2, target) \ argument
115 #define hppa_addc(reg1, reg2, target) \ argument
117 #define hppa_sub(reg1, reg2, target) \ argument
[all …]
/arch/powerpc/kernel/
A Dkvm_emul.S20 #define LL64(reg, offs, reg2) ld reg, (offs)(reg2) argument
21 #define STL64(reg, offs, reg2) std reg, (offs)(reg2) argument
23 #define LL64(reg, offs, reg2) lwz reg, (offs + 4)(reg2) argument
24 #define STL64(reg, offs, reg2) stw reg, (offs + 4)(reg2) argument
/arch/arm64/lib/
A Dcopy_from_user.S47 .macro ldp1 reg1, reg2, ptr, val
48 user_ldp 9997f, \reg1, \reg2, \ptr, \val
51 .macro stp1 reg1, reg2, ptr, val
52 stp \reg1, \reg2, [\ptr], \val
A Dcopy_to_user.S46 .macro ldp1 reg1, reg2, ptr, val
47 ldp \reg1, \reg2, [\ptr], \val
50 .macro stp1 reg1, reg2, ptr, val
51 user_stp 9997f, \reg1, \reg2, \ptr, \val
/arch/s390/kvm/
A Dintercept.c361 int reg1, reg2, rc; in handle_mvpg_pei() local
363 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2); in handle_mvpg_pei()
366 rc = guest_translate_address_with_key(vcpu, vcpu->run->s.regs.gprs[reg2], in handle_mvpg_pei()
367 reg2, &srcaddr, GACC_FETCH, 0); in handle_mvpg_pei()
407 int reg1, reg2, cc = 0, r = 0; in handle_sthyi() local
414 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2); in handle_sthyi()
416 addr = vcpu->run->s.regs.gprs[reg2]; in handle_sthyi()
422 if (reg1 == reg2 || reg1 & 1 || reg2 & 1) in handle_sthyi()
448 r = write_guest(vcpu, addr, reg2, sctns, PAGE_SIZE); in handle_sthyi()
457 vcpu->run->s.regs.gprs[reg2 + 1] = rc; in handle_sthyi()
A Dpriv.c260 int reg1, reg2; in handle_iske() local
307 int reg1, reg2; in handle_rrbe() local
358 int reg1, reg2; in handle_sske() local
434 vcpu->run->s.regs.gprs[reg2] |= end; in handle_sske()
453 int reg2; in handle_test_block() local
1045 int reg1, reg2; in handle_epsw() local
1054 if (reg2) { in handle_epsw()
1056 vcpu->run->s.regs.gprs[reg2] |= in handle_epsw()
1075 int reg1, reg2; in handle_pfmf() local
1174 vcpu->run->s.regs.gprs[reg2] = end; in handle_pfmf()
[all …]
/arch/x86/kernel/
A Duprobes.c460 u8 reg2; in riprel_analyze() local
535 reg2 = 0xff; /* Fetch vex.vvvv */ in riprel_analyze()
537 reg2 = insn->vex_prefix.bytes[2]; in riprel_analyze()
545 reg2 = ((reg2 >> 3) & 0x7) ^ 0x7; in riprel_analyze()
552 if (reg != 6 && reg2 != 6) { in riprel_analyze()
553 reg2 = 6; in riprel_analyze()
555 } else if (reg != 7 && reg2 != 7) { in riprel_analyze()
556 reg2 = 7; in riprel_analyze()
560 reg2 = 3; in riprel_analyze()
574 *cursor = 0x80 | (reg << 3) | reg2; in riprel_analyze()
/arch/parisc/kernel/
A Dsyscall.S54 .macro lws_pagefault_disable reg1,reg2
55 mfctl %cr30, \reg2
56 ldo TASK_PAGEFAULT_DISABLED(\reg2), \reg2
57 ldw 0(%sr2,\reg2), \reg1
59 stw \reg1, 0(%sr2,\reg2)
62 .macro lws_pagefault_enable reg1,reg2
63 mfctl %cr30, \reg2
64 ldo TASK_PAGEFAULT_DISABLED(\reg2), \reg2
65 ldw 0(%sr2,\reg2), \reg1
67 stw \reg1, 0(%sr2,\reg2)
/arch/powerpc/include/asm/book3s/32/
A Dmmu-hash.h71 .macro uus_addi sr reg1 reg2 imm
73 addi \reg1,\reg2,\imm
/arch/mips/mm/
A Dpage.c91 pg_addiu(u32 **buf, unsigned int reg1, unsigned int reg2, unsigned int off) in pg_addiu() argument
101 uasm_i_daddu(buf, reg1, reg2, GPR_T9); in pg_addiu()
106 UASM_i_ADDU(buf, reg1, reg2, GPR_T9); in pg_addiu()
108 UASM_i_ADDIU(buf, reg1, reg2, off); in pg_addiu()
/arch/arm64/boot/dts/rockchip/
A Drk3588-firefly-icore-3588q.dtsi188 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
313 vcc_1v8_s0: pldo-reg2 {
388 vdd_ddr_pll_s0: nldo-reg2 {
A Drk3588-firefly-core-3588j.dtsi191 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
316 vcc_1v8_s0: pldo-reg2 {
391 avdd_ddr_pll_s0: nldo-reg2 {

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