| /arch/sparc/kernel/ |
| A D | pcr.c | 59 WARN_ON_ONCE(reg_num != 0); in direct_pcr_read() 66 WARN_ON_ONCE(reg_num != 0); in direct_pcr_write() 74 WARN_ON_ONCE(reg_num != 0); in direct_pic_read() 81 WARN_ON_ONCE(reg_num != 0); in direct_pic_write() 115 WARN_ON_ONCE(reg_num != 0); in n2_pcr_write() 119 direct_pcr_write(reg_num, val); in n2_pcr_write() 121 direct_pcr_write(reg_num, val); in n2_pcr_write() 148 (void) sun4v_vt_get_perfreg(reg_num, &val); in n4_pcr_read() 155 (void) sun4v_vt_set_perfreg(reg_num, val); in n4_pcr_write() 206 (void) sun4v_t5_set_perfreg(reg_num, val); in n5_pcr_write() [all …]
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| A D | unaligned_32.c | 180 static int do_int_store(int reg_num, int size, unsigned long *dst_addr, in do_int_store() argument 186 if (reg_num) in do_int_store() 187 src_val = fetch_reg_addr(reg_num, regs); in do_int_store()
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| A D | unaligned_64.c | 203 static inline int do_int_store(int reg_num, int size, unsigned long *dst_addr, in do_int_store() argument 212 zero = (((long)(reg_num ? in do_int_store() 213 (unsigned int)fetch_reg(reg_num, regs) : 0)) << 32) | in do_int_store() 214 (unsigned int)fetch_reg(reg_num + 1, regs); in do_int_store() 215 } else if (reg_num) { in do_int_store() 216 src_val_p = fetch_reg_addr(reg_num, regs); in do_int_store()
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| /arch/riscv/kvm/ |
| A D | vcpu_fp.c | 93 if (reg_num == KVM_REG_RISCV_FP_F_REG(fcsr)) in kvm_riscv_vcpu_get_reg_fp() 96 reg_num <= KVM_REG_RISCV_FP_F_REG(f[31])) in kvm_riscv_vcpu_get_reg_fp() 97 reg_val = &cntx->fp.f.f[reg_num]; in kvm_riscv_vcpu_get_reg_fp() 102 if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) { in kvm_riscv_vcpu_get_reg_fp() 107 reg_num <= KVM_REG_RISCV_FP_D_REG(f[31])) { in kvm_riscv_vcpu_get_reg_fp() 110 reg_val = &cntx->fp.d.f[reg_num]; in kvm_riscv_vcpu_get_reg_fp() 138 if (reg_num == KVM_REG_RISCV_FP_F_REG(fcsr)) in kvm_riscv_vcpu_set_reg_fp() 141 reg_num <= KVM_REG_RISCV_FP_F_REG(f[31])) in kvm_riscv_vcpu_set_reg_fp() 142 reg_val = &cntx->fp.f.f[reg_num]; in kvm_riscv_vcpu_set_reg_fp() 147 if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) { in kvm_riscv_vcpu_set_reg_fp() [all …]
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| A D | vcpu_onereg.c | 275 switch (reg_num) { in kvm_riscv_vcpu_get_reg_config() 327 switch (reg_num) { in kvm_riscv_vcpu_set_reg_config() 484 unsigned long reg_num, in kvm_riscv_vcpu_general_get_csr() argument 503 unsigned long reg_num, in kvm_riscv_vcpu_general_set_csr() argument 525 unsigned long reg_num, in kvm_riscv_vcpu_smstateen_set_csr() argument 539 unsigned long reg_num, in kvm_riscv_vcpu_smstateen_get_csr() argument 637 unsigned long reg_num, in riscv_vcpu_get_isa_ext_single() argument 655 unsigned long reg_num, in riscv_vcpu_set_isa_ext_single() argument 690 unsigned long reg_num, in riscv_vcpu_get_isa_ext_multi() argument 699 ext_id = i + reg_num * BITS_PER_LONG; in riscv_vcpu_get_isa_ext_multi() [all …]
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| A D | vcpu_sbi.c | 207 unsigned long reg_num, in riscv_vcpu_set_sbi_ext_single() argument 216 sext = riscv_vcpu_get_sbi_ext(vcpu, reg_num); in riscv_vcpu_set_sbi_ext_single() 228 unsigned long reg_num, in riscv_vcpu_get_sbi_ext_single() argument 245 unsigned long reg_num, in riscv_vcpu_set_sbi_ext_multi() argument 254 ext_id = i + reg_num * BITS_PER_LONG; in riscv_vcpu_set_sbi_ext_multi() 265 unsigned long reg_num, in riscv_vcpu_get_sbi_ext_multi() argument 274 ext_id = i + reg_num * BITS_PER_LONG; in riscv_vcpu_get_sbi_ext_multi() 304 reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_set_reg_sbi_ext() 338 reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_get_reg_sbi_ext() 380 reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_set_reg_sbi() [all …]
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| A D | vcpu_vector.c | 97 unsigned long reg_num, in kvm_riscv_vcpu_vreg_addr() argument 104 if (reg_num < KVM_REG_RISCV_VECTOR_REG(0)) { in kvm_riscv_vcpu_vreg_addr() 107 switch (reg_num) { in kvm_riscv_vcpu_vreg_addr() 127 } else if (reg_num <= KVM_REG_RISCV_VECTOR_REG(31)) { in kvm_riscv_vcpu_vreg_addr() 131 (reg_num - KVM_REG_RISCV_VECTOR_REG(0)) * vlenb; in kvm_riscv_vcpu_vreg_addr() 145 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_get_reg_vector() local 155 rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, ®_addr); in kvm_riscv_vcpu_get_reg_vector() 171 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_set_reg_vector() local 181 if (reg_num == KVM_REG_RISCV_VECTOR_CSR_REG(vlenb)) { in kvm_riscv_vcpu_set_reg_vector() 193 rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, ®_addr); in kvm_riscv_vcpu_set_reg_vector()
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| A D | vcpu_sbi_sta.c | 163 unsigned long reg_num, in kvm_riscv_vcpu_get_reg_sbi_sta() argument 166 switch (reg_num) { in kvm_riscv_vcpu_get_reg_sbi_sta() 184 unsigned long reg_num, in kvm_riscv_vcpu_set_reg_sbi_sta() argument 187 switch (reg_num) { in kvm_riscv_vcpu_set_reg_sbi_sta()
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| A D | vcpu_timer.c | 165 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_get_reg_timer() local 172 if (reg_num >= sizeof(struct kvm_riscv_timer) / sizeof(u64)) in kvm_riscv_vcpu_get_reg_timer() 175 switch (reg_num) { in kvm_riscv_vcpu_get_reg_timer() 205 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_set_reg_timer() local 213 if (reg_num >= sizeof(struct kvm_riscv_timer) / sizeof(u64)) in kvm_riscv_vcpu_set_reg_timer() 219 switch (reg_num) { in kvm_riscv_vcpu_set_reg_timer()
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| A D | aia.c | 181 unsigned long reg_num, in kvm_riscv_vcpu_aia_get_csr() argument 186 if (reg_num >= sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long)) in kvm_riscv_vcpu_aia_get_csr() 191 *out_val = ((unsigned long *)csr)[reg_num]; in kvm_riscv_vcpu_aia_get_csr() 197 unsigned long reg_num, in kvm_riscv_vcpu_aia_set_csr() argument 202 if (reg_num >= sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long)) in kvm_riscv_vcpu_aia_set_csr() 206 ((unsigned long *)csr)[reg_num] = val; in kvm_riscv_vcpu_aia_set_csr() 209 if (reg_num == KVM_REG_RISCV_CSR_AIA_REG(siph)) in kvm_riscv_vcpu_aia_set_csr()
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| /arch/powerpc/platforms/powernv/ |
| A D | opal-fadump.h | 82 __be32 reg_num; member 87 u32 reg_type, u32 reg_num, in opal_fadump_set_regval_regnum() argument 91 if (reg_num < 32) in opal_fadump_set_regval_regnum() 92 regs->gpr[reg_num] = reg_val; in opal_fadump_set_regval_regnum() 96 switch (reg_num) { in opal_fadump_set_regval_regnum() 141 be32_to_cpu(reg_entry->reg_num), in opal_fadump_read_regs()
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| /arch/riscv/include/asm/ |
| A D | kvm_vcpu_sbi.h | 88 int kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long reg_num, 90 int kvm_riscv_vcpu_set_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long reg_num,
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| A D | kvm_aia.h | 133 unsigned long reg_num, 136 unsigned long reg_num,
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| /arch/arm64/include/asm/ |
| A D | kvm_emulate.h | 182 u8 reg_num) in vcpu_get_reg() argument 184 return (reg_num == 31) ? 0 : vcpu_gp_regs(vcpu)->regs[reg_num]; in vcpu_get_reg() 187 static __always_inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num, in vcpu_set_reg() argument 190 if (reg_num != 31) in vcpu_set_reg() 191 vcpu_gp_regs(vcpu)->regs[reg_num] = val; in vcpu_set_reg()
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| /arch/sparc/include/asm/ |
| A D | hypervisor.h | 3445 unsigned long sun4v_vt_get_perfreg(unsigned long reg_num, 3447 unsigned long sun4v_vt_set_perfreg(unsigned long reg_num, 3455 unsigned long sun4v_t5_get_perfreg(unsigned long reg_num, 3457 unsigned long sun4v_t5_set_perfreg(unsigned long reg_num, 3466 unsigned long sun4v_m7_get_perfreg(unsigned long reg_num, 3468 unsigned long sun4v_m7_set_perfreg(unsigned long reg_num,
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| /arch/powerpc/sysdev/ |
| A D | mpic_msgr.c | 49 struct mpic_msgr *mpic_msgr_get(unsigned int reg_num) in mpic_msgr_get() argument 57 if (reg_num >= mpic_msgr_count) in mpic_msgr_get() 61 msgr = mpic_msgrs[reg_num]; in mpic_msgr_get()
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| /arch/powerpc/include/asm/ |
| A D | mpic_msgr.h | 33 extern struct mpic_msgr *mpic_msgr_get(unsigned int reg_num);
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| /arch/sh/kernel/ |
| A D | dwarf.c | 63 unsigned int reg_num) in dwarf_frame_alloc_reg() argument 77 reg->number = reg_num; in dwarf_frame_alloc_reg() 105 unsigned int reg_num) in dwarf_frame_reg() argument 110 if (reg->number == reg_num) in dwarf_frame_reg()
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| /arch/arm64/kvm/ |
| A D | guest.c | 432 unsigned int reg_num; in sve_reg_to_region() local 448 reg_num = (reg->id & SVE_REG_ID_MASK) >> SVE_REG_ID_SHIFT; in sve_reg_to_region() 456 reqoffset = SVE_SIG_ZREG_OFFSET(vq, reg_num) - in sve_reg_to_region() 466 reqoffset = SVE_SIG_PREG_OFFSET(vq, reg_num) - in sve_reg_to_region()
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