Searched refs:reset (Results 1 – 25 of 1553) sorted by relevance
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| /arch/arm64/boot/dts/apple/ |
| A D | t8103-pmgr.dtsi | 14 #reset-cells = <0>;
23 #reset-cells = <0>;
32 #reset-cells = <0>;
41 #reset-cells = <0>;
49 #reset-cells = <0>;
57 #reset-cells = <0>;
65 #reset-cells = <0>;
73 #reset-cells = <0>;
82 #reset-cells = <0>;
91 #reset-cells = <0>;
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| A D | t8015-pmgr.dtsi | 13 #reset-cells = <0>;
22 #reset-cells = <0>;
31 #reset-cells = <0>;
40 #reset-cells = <0>;
49 #reset-cells = <0>;
58 #reset-cells = <0>;
67 #reset-cells = <0>;
76 #reset-cells = <0>;
84 #reset-cells = <0>;
93 #reset-cells = <0>;
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| A D | t8012-pmgr.dtsi | 13 #reset-cells = <0>;
22 #reset-cells = <0>;
31 #reset-cells = <0>;
40 #reset-cells = <0>;
48 #reset-cells = <0>;
57 #reset-cells = <0>;
65 #reset-cells = <0>;
74 #reset-cells = <0>;
83 #reset-cells = <0>;
91 #reset-cells = <0>;
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| A D | t8112-pmgr.dtsi | 14 #reset-cells = <0>;
23 #reset-cells = <0>;
32 #reset-cells = <0>;
41 #reset-cells = <0>;
49 #reset-cells = <0>;
57 #reset-cells = <0>;
66 #reset-cells = <0>;
75 #reset-cells = <0>;
84 #reset-cells = <0>;
93 #reset-cells = <0>;
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| A D | s8001-pmgr.dtsi | 13 #reset-cells = <0>;
22 #reset-cells = <0>;
31 #reset-cells = <0>;
40 #reset-cells = <0>;
48 #reset-cells = <0>;
57 #reset-cells = <0>;
66 #reset-cells = <0>;
75 #reset-cells = <0>;
83 #reset-cells = <0>;
91 #reset-cells = <0>;
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| A D | t8010-pmgr.dtsi | 13 #reset-cells = <0>;
22 #reset-cells = <0>;
31 #reset-cells = <0>;
40 #reset-cells = <0>;
48 #reset-cells = <0>;
57 #reset-cells = <0>;
66 #reset-cells = <0>;
75 #reset-cells = <0>;
83 #reset-cells = <0>;
91 #reset-cells = <0>;
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| A D | t8011-pmgr.dtsi | 13 #reset-cells = <0>;
22 #reset-cells = <0>;
31 #reset-cells = <0>;
40 #reset-cells = <0>;
49 #reset-cells = <0>;
57 #reset-cells = <0>;
66 #reset-cells = <0>;
75 #reset-cells = <0>;
84 #reset-cells = <0>;
92 #reset-cells = <0>;
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| A D | s800-0-3-pmgr.dtsi | 13 #reset-cells = <0>;
22 #reset-cells = <0>;
31 #reset-cells = <0>;
40 #reset-cells = <0>;
48 #reset-cells = <0>;
57 #reset-cells = <0>;
66 #reset-cells = <0>;
75 #reset-cells = <0>;
83 #reset-cells = <0>;
91 #reset-cells = <0>;
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| A D | s5l8960x-pmgr.dtsi | 13 #reset-cells = <0>;
22 #reset-cells = <0>;
31 #reset-cells = <0>;
40 #reset-cells = <0>;
49 #reset-cells = <0>;
58 #reset-cells = <0>;
67 #reset-cells = <0>;
76 #reset-cells = <0>;
85 #reset-cells = <0>;
93 #reset-cells = <0>;
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| A D | t7001-pmgr.dtsi | 13 #reset-cells = <0>;
22 #reset-cells = <0>;
31 #reset-cells = <0>;
40 #reset-cells = <0>;
49 #reset-cells = <0>;
57 #reset-cells = <0>;
66 #reset-cells = <0>;
75 #reset-cells = <0>;
84 #reset-cells = <0>;
92 #reset-cells = <0>;
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| A D | t7000-pmgr.dtsi | 12 #reset-cells = <0>;
21 #reset-cells = <0>;
30 #reset-cells = <0>;
39 #reset-cells = <0>;
47 #reset-cells = <0>;
56 #reset-cells = <0>;
65 #reset-cells = <0>;
74 #reset-cells = <0>;
82 #reset-cells = <0>;
90 #reset-cells = <0>;
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| A D | t600x-pmgr.dtsi | 13 #reset-cells = <0>;
22 #reset-cells = <0>;
31 #reset-cells = <0>;
40 #reset-cells = <0>;
49 #reset-cells = <0>;
58 #reset-cells = <0>;
67 #reset-cells = <0>;
76 #reset-cells = <0>;
84 #reset-cells = <0>;
92 #reset-cells = <0>;
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| /arch/m68k/coldfire/ |
| A D | Makefile | 19 obj-$(CONFIG_M5206) += m5206.o intc.o reset.o
20 obj-$(CONFIG_M5206e) += m5206.o intc.o reset.o
21 obj-$(CONFIG_M520x) += m520x.o intc-simr.o reset.o
23 obj-$(CONFIG_M5249) += m5249.o intc.o intc-5249.o reset.o
24 obj-$(CONFIG_M525x) += m525x.o intc.o intc-525x.o reset.o
25 obj-$(CONFIG_M527x) += m527x.o intc-2.o reset.o
27 obj-$(CONFIG_M528x) += m528x.o intc-2.o reset.o
28 obj-$(CONFIG_M5307) += m5307.o intc.o reset.o
29 obj-$(CONFIG_M53xx) += m53xx.o intc-simr.o reset.o
30 obj-$(CONFIG_M5407) += m5407.o intc.o reset.o
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| /arch/arm/boot/dts/amlogic/ |
| A D | meson8m2.dtsi | 37 reset-names = "stmmaceth";
66 resets = <&reset RESET_DBLK>,
67 <&reset RESET_PIC_DC>,
68 <&reset RESET_HDMI_APB>,
70 <&reset RESET_VENCI>,
71 <&reset RESET_VENCP>,
72 <&reset RESET_VDAC_4>,
73 <&reset RESET_VENCL>,
74 <&reset RESET_VIU>,
75 <&reset RESET_VENC>,
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| /arch/arm64/boot/dts/realtek/ |
| A D | rtd139x.dtsi | 124 reset1: reset-controller@0 {
125 compatible = "snps,dw-low-reset";
127 #reset-cells = <1>;
130 reset2: reset-controller@4 {
133 #reset-cells = <1>;
136 reset3: reset-controller@8 {
139 #reset-cells = <1>;
142 reset4: reset-controller@50 {
145 #reset-cells = <1>;
150 iso_reset: reset-controller@88 {
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| A D | rtd129x.dtsi | 126 reset1: reset-controller@0 {
127 compatible = "snps,dw-low-reset";
129 #reset-cells = <1>;
132 reset2: reset-controller@4 {
135 #reset-cells = <1>;
138 reset3: reset-controller@8 {
141 #reset-cells = <1>;
144 reset4: reset-controller@50 {
147 #reset-cells = <1>;
152 iso_reset: reset-controller@88 {
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| /arch/arm64/boot/dts/qcom/ |
| A D | sa8775p-ride.dts | 33 reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
34 reset-assert-us = <11000>;
35 reset-deassert-us = <70000>;
43 reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
44 reset-assert-us = <11000>;
45 reset-deassert-us = <70000>;
|
| A D | sa8775p-ride-r3.dts | 33 reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
34 reset-assert-us = <11000>;
35 reset-deassert-us = <70000>;
43 reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
44 reset-assert-us = <11000>;
45 reset-deassert-us = <70000>;
|
| /arch/arm/boot/dts/realtek/ |
| A D | rtd1195.dtsi | 164 reset1: reset-controller@0 {
165 compatible = "snps,dw-low-reset";
167 #reset-cells = <1>;
170 reset2: reset-controller@4 {
171 compatible = "snps,dw-low-reset";
173 #reset-cells = <1>;
176 reset3: reset-controller@8 {
177 compatible = "snps,dw-low-reset";
179 #reset-cells = <1>;
184 iso_reset: reset-controller@88 {
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| /arch/arm64/boot/dts/rockchip/ |
| A D | rk3568-fastrhino-r68s.dts | 67 reset-assert-us = <20000>;
68 reset-deassert-us = <100000>;
69 reset-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
79 reset-assert-us = <20000>;
80 reset-deassert-us = <100000>;
81 reset-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>;
87 eth_phy0_reset_pin: eth-phy0-reset-pin {
93 eth_phy1_reset_pin: eth-phy1-reset-pin {
|
| /arch/arm/boot/dts/socionext/ |
| A D | uniphier-pro4.dtsi | 254 mio_rst: reset-controller {
256 #reset-cells = <1>;
270 peri_rst: reset-controller {
272 #reset-cells = <1>;
327 cap-mmc-hw-reset;
495 sys_rst: reset-controller {
497 #reset-cells = <1>;
552 #reset-cells = <1>;
599 #reset-cells = <1>;
664 #reset-cells = <1>;
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| A D | uniphier-pxs2.dtsi | 277 reset-names = "aio";
437 #reset-cells = <1>;
453 #reset-cells = <1>;
469 cap-mmc-hw-reset;
482 reset-names = "host";
572 #reset-cells = <1>;
592 reset-names = "ether";
629 reset-names = "link";
631 #reset-cells = <1>;
672 #reset-cells = <1>;
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| /arch/arm64/boot/dts/renesas/ |
| A D | r8a779a0-falcon-ethernet.dtsi | 28 reset-gpios = <&gpio5 15 GPIO_ACTIVE_LOW>;
29 reset-post-delay-us = <4000>;
49 reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
50 reset-post-delay-us = <4000>;
70 reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;
71 reset-post-delay-us = <4000>;
91 reset-gpios = <&gpio8 15 GPIO_ACTIVE_LOW>;
92 reset-post-delay-us = <4000>;
112 reset-gpios = <&gpio9 15 GPIO_ACTIVE_LOW>;
113 reset-post-delay-us = <4000>;
|
| /arch/arm64/boot/dts/amlogic/ |
| A D | amlogic-a5.dtsi | 7 #include "amlogic-a5-reset.h"
54 reset: reset-controller@2000 { label
55 compatible = "amlogic,a5-reset",
56 "amlogic,meson-s4-reset";
58 #reset-cells = <1>;
|
| /arch/arm64/boot/dts/socionext/ |
| A D | uniphier-pxs3.dtsi | 387 #reset-cells = <1>;
403 #reset-cells = <1>;
435 reset-names = "host";
554 #reset-cells = <1>;
578 reset-names = "ether";
599 reset-names = "ether";
638 #reset-cells = <1>;
679 #reset-cells = <1>;
720 #reset-cells = <1>;
823 #reset-cells = <1>;
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