Home
last modified time | relevance | path

Searched refs:rv (Results 1 – 25 of 56) sorted by relevance

123

/arch/x86/lib/
A Dmsr-smp.c39 memset(&rv, 0, sizeof(rv)); in rdmsr_on_cpu()
55 memset(&rv, 0, sizeof(rv)); in rdmsrq_on_cpu()
70 memset(&rv, 0, sizeof(rv)); in wrmsr_on_cpu()
86 memset(&rv, 0, sizeof(rv)); in wrmsrq_on_cpu()
104 memset(&rv, 0, sizeof(rv)); in __rwmsr_on_cpus()
156 rv->msr.err = rdmsr_safe(rv->msr.msr_no, &rv->msr.reg.l, &rv->msr.reg.h); in __rdmsr_safe_on_cpu()
164 rv->err = wrmsr_safe(rv->msr_no, rv->reg.l, rv->reg.h); in __wrmsr_safe_on_cpu()
175 memset(&rv, 0, sizeof(rv)); in rdmsr_safe_on_cpu()
196 memset(&rv, 0, sizeof(rv)); in wrmsr_safe_on_cpu()
212 memset(&rv, 0, sizeof(rv)); in wrmsrq_safe_on_cpu()
[all …]
/arch/arm/include/debug/
A Dbrcmstb.S41 cmp rp, rv ; \
47 .macro addruart, rp, rv, tmp
50 sub \rv, \rv, \rp @ offset between the two
56 mov \rv, #0 @ yes; record init is done
57 str \rv, [\tmp]
62 and \rv, \rv, \rp
64 cmp \rv, \rp
69 ands \rv, \rv, #REG_PHYS_BASE
75 ARM_BE8( rev \rv, \rv )
76 and \rv, \rv, #0xffffff00 @ strip revision bits [7:0]
[all …]
A Dtegra.S67 .macro addruart, rp, rv, tmp
70 sub \rv, \rv, \rp @ offset between the two
77 str \rv, [\tmp]
84 and \rv, \rv, #3
90 and \rv, #7
91 cmp \rv, #0 @ UART 0?
93 cmp \rv, #1 @ UART 1?
95 cmp \rv, #2 @ UART 2?
97 cmp \rv, #3 @ UART 3?
99 cmp \rv, #4 @ UART 4?
[all …]
A Dsa1100.S17 .macro addruart, rp, rv, tmp
29 ldr \rv, [\rp, #UTCR3]
30 tst \rv, #UTCR3_TXE
34 ldreq \rv, [\rp, #UTCR3]
35 tsteq \rv, #UTCR3_TXE
39 ldreq \rv, [\rp, #UTCR3]
40 tsteq \rv, #UTCR3_TXE
45 orr \rv, \rp, #0xf8000000 @ virtual
A Domap2plus.S27 .macro addruart, rp, rv, tmp
31 ldr \rv, [\rp] @ get absolute addr of 99f
32 sub \rv, \rv, \rp @ offset between the two
34 sub \tmp, \rp, \rv @ make it effective
36 ldr \rv, [\tmp, #4] @ omap_uart_virt
38 cmpne \rv, #0
60 add \rv, \rv, \tmp
A Dvexpress.S22 .macro addruart,rp,rv,tmp
31 movw \rv, #0xc091
32 movt \rv, #0x410f
33 cmp \rp, \rv
37 orreq \rv, \rp, #DEBUG_LL_VIRT_BASE
42 orrne \rv, \rp, #DEBUG_LL_VIRT_BASE
A Ds5pv210.S19 .macro addruart, rp, rv, tmp
21 ldr \rv, =S3C_VA_UART
24 add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART)
A Dexynos.S20 .macro addruart, rp, rv, tmp
30 ldr \rv, =S3C_VA_UART
33 add \rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART)
A Dvf.S16 .macro addruart, rp, rv, tmp
18 and \rv, \rp, #0xffffff @ offset within 16MB section
19 add \rv, \rv, #VF_UART_VIRTUAL_BASE
A Ds3c24xx.S16 .macro addruart, rp, rv, tmp
18 ldr \rv, = CONFIG_DEBUG_UART_VIRT
A Dux500.S34 .macro addruart, rp, rv, tmp
36 ldr \rv, =UART_VIRT_BASE @ yes, virtual address
A Dasm9260.S9 .macro addruart, rp, rv, tmp
11 ldr \rv, = CONFIG_DEBUG_UART_VIRT
A Ddigicolor.S14 .macro addruart, rp, rv, tmp
16 ldr \rv, =CONFIG_DEBUG_UART_VIRT
A Dvt8500.S15 .macro addruart, rp, rv, tmp
17 orr \rv, \rp, #DEBUG_LL_VIRT_BASE
A Dclps711x.S18 .macro addruart, rp, rv, tmp
19 ldr \rv, =CLPS711X_UART_VADDR
/arch/x86/mm/
A Dpf_in.c122 rv = type; \
144 return rv; in get_ins_type()
283 if (rv) in get_reg_w8()
284 return rv; in get_reg_w8()
326 if (!rv) in get_reg_w8()
329 return rv; in get_reg_w8()
338 rv = &regs->ax; in get_reg_w32()
341 rv = &regs->bx; in get_reg_w32()
344 rv = &regs->cx; in get_reg_w32()
347 rv = &regs->dx; in get_reg_w32()
[all …]
/arch/powerpc/platforms/pseries/
A Dreconfig.c222 rv = -ENOMEM; in do_add_node()
228 rv = -EINVAL; in do_add_node()
235 if (rv) in do_add_node()
237 return rv; in do_add_node()
249 return rv; in do_remove_node()
361 int rv; in ofdt_write() local
366 if (rv) in ofdt_write()
367 return rv; in ofdt_write()
375 rv = -EINVAL; in ofdt_write()
392 rv = -EINVAL; in ofdt_write()
[all …]
/arch/x86/boot/
A Dstring.c253 unsigned int rv; in _parse_integer() local
256 rv = 0; in _parse_integer()
277 rv |= KSTRTOX_OVERFLOW; in _parse_integer()
280 rv++; in _parse_integer()
284 return rv; in _parse_integer()
290 unsigned int rv; in _kstrtoull() local
296 if (rv == 0) in _kstrtoull()
298 s += rv; in _kstrtoull()
333 int rv; in _kstrtoul() local
336 if (rv < 0) in _kstrtoul()
[all …]
A Dvideo-mode.c147 int rv; in set_mode() local
158 rv = raw_set_mode(mode, &real_mode); in set_mode()
159 if (rv) in set_mode()
160 return rv; in set_mode()
/arch/riscv/boot/dts/allwinner/
A DMakefile5 dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-480p.dtb
6 dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-720p.dtb
7 dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-dock.dtb
8 dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv.dtb
A Dsun20i-d1-lichee-rv-86-panel-720p.dts4 #include "sun20i-d1-lichee-rv-86-panel.dtsi"
8 compatible = "sipeed,lichee-rv-86-panel-720p", "sipeed,lichee-rv",
A Dsun20i-d1-lichee-rv-86-panel-480p.dts4 #include "sun20i-d1-lichee-rv-86-panel.dtsi"
8 compatible = "sipeed,lichee-rv-86-panel-480p", "sipeed,lichee-rv",
/arch/mips/math-emu/
A Dcp1emu.c1791 if (rv.w & 0x1) in fpu_emu()
1792 rv.w = 0; in fpu_emu()
1803 if (rv.w & 0x1) in fpu_emu()
1806 rv.w = 0; in fpu_emu()
2162 if (rv.l & 0x1) in fpu_emu()
2163 rv.l = 0; in fpu_emu()
2174 if (rv.l & 0x1) in fpu_emu()
2177 rv.l = 0; in fpu_emu()
2551 rv.w = 0; in fpu_emu()
2711 rv.l = 0; in fpu_emu()
[all …]
/arch/powerpc/xmon/
A Dnonstdio.c40 int rv = 0; in xmon_write() local
45 return rv; in xmon_write()
52 rv += udbg_write(p, q - p + 1); in xmon_write()
80 return rv + udbg_write(p, nb - (p - ptr)); in xmon_write()
/arch/mips/cavium-octeon/
A Dcsrc-octeon.c118 unsigned long long rv; in sched_clock() local
132 : [rv] "=&r" (rv), [t1] "=&r" (t1), [t2] "=&r" (t2), [t3] "=&r" (t3) in sched_clock()
135 return rv; in sched_clock()

Completed in 31 milliseconds

123