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Searched refs:sar (Results 1 – 25 of 40) sorted by relevance

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/arch/sh/drivers/dma/
A Ddma-g2.c97 if (chan->sar & 31) { in g2_xfer_dma()
98 printk("g2dma: unaligned source 0x%lx\n", chan->sar); in g2_xfer_dma()
117 flush_icache_range((unsigned long)chan->sar, chan->count); in g2_xfer_dma()
122 g2_dma->channel[chan_nr].root_addr = chan->sar & 0x1fffffe0; in g2_xfer_dma()
A Ddma-pvr2.c55 if (chan->sar || !chan->dar) in pvr2_xfer_dma()
A Ddma-sh.c229 if (chan->sar || (mach_is_dreamcast() && in sh_dmac_xfer_dma()
231 __raw_writel(chan->sar, (dma_base_addr(chan->chan) + SAR)); in sh_dmac_xfer_dma()
A Ddma-api.c157 channel->sar = from; in dma_xfer()
/arch/parisc/include/uapi/asm/
A Dptrace.h35 unsigned long sar; /* CR11 */ member
56 unsigned long sar; /* CR11 */ member
/arch/parisc/kernel/
A Dkgdb.c81 gr->sar = regs->sar; in pt_regs_to_gdb_regs()
112 regs->sar = gr->sar; in gdb_regs_to_pt_regs()
A Dperf_asm.S154 shrpd ret0,%r0,%sar,%r1
178 shrpd ret0,%r0,%sar,%r1
274 shrpd ret0,%r0,%sar,%r1
286 shrpd ret0,%r0,%sar,%r1
322 shrpd ret0,%r0,%sar,%r1
358 shrpd ret0,%r0,%sar,%r1
370 shrpd ret0,%r0,%sar,%r1
466 shrpd ret0,%r0,%sar,%r1
478 shrpd ret0,%r0,%sar,%r1
514 shrpd ret0,%r0,%sar,%r1
A Dsignal32.c100 regs->sar = ((u64)compat_regt << 32) | (u64)compat_reg; in restore_sigcontext32()
102 DBG(2,"restore_sigcontext32: sar is %#lx\n", regs->sar); in restore_sigcontext32()
238 compat_reg = (compat_uint_t)(regs->sar); in setup_sigcontext32()
242 compat_reg = (compat_uint_t)(regs->sar >> 32); in setup_sigcontext32()
A Dtoc.c35 regs->sar = (unsigned long)toc->cr[11]; in toc20_to_pt_regs()
58 regs->sar = toc->cr[11]; in toc11_to_pt_regs()
A Dptrace.c454 case RI(sar): return regs->sar; in get_reg()
500 case RI(sar): regs->sar = val; in set_reg()
720 REG_OFFSET_NAME(sar),
A Dsignal.c69 err |= __get_user(regs->sar, &sc->sc_sar); in restore_sigcontext()
206 err |= __put_user(regs->sar, &sc->sc_sar); in setup_sigcontext()
/arch/parisc/lib/
A Dlusercopy.S295 shrpw a2, a3, %sar, t0
301 shrpw a3, a0, %sar, t0
307 shrpw a0, a1, %sar, t0
313 shrpw a1, a2, %sar, t0
320 shrpw a2, a3, %sar, t0
/arch/parisc/include/asm/
A Dkgdb.h33 unsigned long sar; member
A Delf.h284 dst[44] = pt->sar; dst[45] = pt->iir; \
A Dasmregs.h121 sar: .reg %cr11
/arch/xtensa/include/uapi/asm/
A Dptrace.h53 __u32 sar; member
/arch/xtensa/kernel/
A Dptrace.c50 .sar = regs->sar, in gpr_get()
90 regs->sar = newregs.sar; in gpr_set()
322 tmp = regs->sar; in ptrace_peekusr()
A Dcoprocessor.S155 rsr a3, sar
261 wsr a0, sar
A Dalign.S363 wsr a0, sar
479 wsr a0, sar
499 rsr a5, sar
550 wsr a4, sar
A Dsignal.c156 COPY(sar); in setup_sigcontext()
194 COPY(sar); in restore_sigcontext()
A Dentry.S139 rsr a3, sar
232 rsr a2, sar # original WINDOWBASE
292 rsr a3, sar
626 rsr a3, sar
744 wsr a3, sar
1249 rsr a0, sar
1556 rsr a3, sar # WB is still in SAR
/arch/xtensa/include/asm/
A Dptrace.h64 unsigned long sar; /* 44 */ member
/arch/sh/include/asm/
A Ddma.h70 unsigned long sar; member
/arch/arm64/boot/dts/mediatek/
A Dmt8186-corsola-krabby.dtsi122 sar_sensor_pins: sar-sensor-pins {
/arch/x86/lib/
A Dputuser.S39 sar $63, %rbx

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