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Searched refs:sel (Results 1 – 25 of 210) sorted by relevance

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/arch/arm/mach-dove/
A Dmpp.c68 static void __init dove_mpp_cfg_nfc(int sel) in dove_mpp_cfg_nfc() argument
73 mpp_gen_cfg |= sel; in dove_mpp_cfg_nfc()
79 static void __init dove_mpp_cfg_au1(int sel) in dove_mpp_cfg_au1() argument
91 if (!sel || sel == 0x2) in dove_mpp_cfg_au1()
96 if (sel & 0x1) { in dove_mpp_cfg_au1()
100 if (sel & 0x2) { in dove_mpp_cfg_au1()
104 if (sel & 0x4) { in dove_mpp_cfg_au1()
108 if (sel & 0x8) in dove_mpp_cfg_au1()
126 unsigned int sel = MPP_SEL(*mpp_grp_list); in dove_mpp_conf_grp() local
134 mpp_ctrl4 |= sel << num; in dove_mpp_conf_grp()
[all …]
/arch/x86/kernel/
A Dtls.c157 savesegment(ds, sel); in do_set_thread_area()
158 if (sel == modified_sel) in do_set_thread_area()
159 loadsegment(ds, sel); in do_set_thread_area()
161 savesegment(es, sel); in do_set_thread_area()
162 if (sel == modified_sel) in do_set_thread_area()
163 loadsegment(es, sel); in do_set_thread_area()
165 savesegment(fs, sel); in do_set_thread_area()
166 if (sel == modified_sel) in do_set_thread_area()
167 loadsegment(fs, sel); in do_set_thread_area()
170 savesegment(gs, sel); in do_set_thread_area()
[all …]
A Dldt.c119 unsigned short sel; in refresh_ldt_segments() local
125 savesegment(ds, sel); in refresh_ldt_segments()
126 if ((sel & SEGMENT_TI_MASK) == SEGMENT_LDT) in refresh_ldt_segments()
127 loadsegment(ds, sel); in refresh_ldt_segments()
129 savesegment(es, sel); in refresh_ldt_segments()
130 if ((sel & SEGMENT_TI_MASK) == SEGMENT_LDT) in refresh_ldt_segments()
131 loadsegment(es, sel); in refresh_ldt_segments()
/arch/x86/lib/
A Dinsn-eval.c358 return sel; in get_segment_selector()
361 return sel; in get_segment_selector()
364 return sel; in get_segment_selector()
367 return sel; in get_segment_selector()
407 return sel; in get_segment_selector()
633 sel >>= 3; in get_desc()
692 short sel; in insn_get_seg_base() local
730 if (!sel) in insn_get_seg_base()
760 short sel; in get_seg_limit() local
769 if (!sel) in get_seg_limit()
[all …]
/arch/mips/include/asm/mach-loongson64/
A Dcpucfg-emul.h22 __u64 sel) in loongson3_cpucfg_read_synthesized() argument
24 switch (sel) { in loongson3_cpucfg_read_synthesized()
30 return c->loongson3_cpucfg_data[sel - 1]; in loongson3_cpucfg_read_synthesized()
68 __u64 sel) in loongson3_cpucfg_read_synthesized() argument
/arch/mips/include/asm/
A Dmipsmtregs.h312 __rs << 11 | \\sel) \
314 __rs << 16 | \\sel << 4))
317 #define mftc0(rt, sel) \ argument
325 " mftc0 %0, " #rt ", " #sel " \n" \
357 #define mftr(rt, u, sel) \ argument
391 __rs << 11 | \\sel) \
393 __rs << 16 | \\sel << 4))
396 #define mttc0(rs, sel, v) \ argument
402 " mttc0 %0," #rs ", " #sel " \n" \
410 #define mttr(rd, u, sel, v) \ argument
[all …]
A Dmipsregs.h1574 if (sel == 0) \
1592 else if (sel == 0) \
1623 if (sel == 0) \
1640 else if (sel == 0) \
1702 if (sel == 0) \
1739 else if (sel == 0) \
1794 : "i" (sel)); \
2271 : "i" (sel)); \
2284 : "i" (sel)); \
2297 "i" (sel)); \
[all …]
A Dkvm_host.h439 return cop0->reg[(_reg)][(sel)]; \
444 cop0->reg[(_reg)][(sel)] = val; \
452 cop0->reg[(_reg)][(sel)] |= val; \
457 cop0->reg[(_reg)][(sel)] &= ~val; \
464 cop0->reg[(_reg)][(sel)] &= ~_mask; \
465 cop0->reg[(_reg)][(sel)] |= val & _mask; \
525 #define __BUILD_KVM_SAVE_VZ(name, _reg, sel) \ argument
528 write_gc0_##name(cop0->reg[(_reg)][(sel)]); \
606 __BUILD_KVM_RW_VZ(name, type, _reg, sel) \
608 __BUILD_KVM_SAVE_VZ(name, _reg, sel)
[all …]
/arch/x86/include/asm/
A Dgsseg.h22 u16 sel = selector; in native_lkgs() local
24 _ASM_EXTABLE_TYPE_REG(1b, 1b, EX_TYPE_ZERO_REG, %k[sel]) in native_lkgs()
25 : [sel] "+D" (sel)); in native_lkgs()
/arch/powerpc/perf/
A Dmpc7450-pmu.c79 int pmc, sel; in mpc7450_threshold_use() local
82 sel = event & PM_PMCSEL_MSK; in mpc7450_threshold_use()
85 if (sel == 0x1e || sel == 0x1f) in mpc7450_threshold_use()
87 if (sel == 0x28 || sel == 0x2b) in mpc7450_threshold_use()
91 if (sel == 0x20) in mpc7450_threshold_use()
95 if (sel == 0xc || sel == 0xd) in mpc7450_threshold_use()
97 if (sel == 0x11) in mpc7450_threshold_use()
101 if (sel == 0x10) in mpc7450_threshold_use()
/arch/arm64/boot/dts/freescale/
A Dfsl-lx2160a-tqmlx2160a-mblx2160a.dts114 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
119 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
124 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
129 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
134 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
139 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
148 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
153 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
160 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
167 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
/arch/arm64/boot/dts/ti/
A Dk3-am62p-j722s-common-main.dtsi580 ti,clkbuf-sel = <0x7>;
581 ti,strobe-sel = <0x77>;
585 ti,otap-del-sel-ddr52 = <0x6>;
586 ti,otap-del-sel-hs200 = <0x8>;
587 ti,otap-del-sel-hs400 = <0x5>;
590 ti,itap-del-sel-ddr52 = <0x3>;
602 ti,clkbuf-sel = <0x7>;
604 ti,otap-del-sel-sd-hs = <0x0>;
605 ti,otap-del-sel-sdr12 = <0xf>;
606 ti,otap-del-sel-sdr25 = <0xf>;
[all …]
A Dk3-am62-main.dtsi557 ti,clkbuf-sel = <0x7>;
560 ti,otap-del-sel-hs200 = <0x6>;
574 ti,clkbuf-sel = <0x7>;
576 ti,otap-del-sel-sd-hs = <0x0>;
577 ti,otap-del-sel-sdr12 = <0xf>;
578 ti,otap-del-sel-sdr25 = <0xf>;
579 ti,otap-del-sel-sdr50 = <0xc>;
581 ti,otap-del-sel-ddr50 = <0x9>;
583 ti,itap-del-sel-sd-hs = <0x0>;
584 ti,itap-del-sel-sdr12 = <0x0>;
[all …]
A Dk3-am62a-main.dtsi590 ti,clkbuf-sel = <0x7>;
593 ti,otap-del-sel-hs200 = <0x6>;
605 ti,clkbuf-sel = <0x7>;
607 ti,otap-del-sel-sd-hs = <0x0>;
608 ti,otap-del-sel-sdr12 = <0xf>;
609 ti,otap-del-sel-sdr25 = <0xf>;
610 ti,otap-del-sel-sdr50 = <0xc>;
612 ti,otap-del-sel-ddr50 = <0x9>;
614 ti,itap-del-sel-sd-hs = <0x0>;
615 ti,itap-del-sel-sdr12 = <0x0>;
[all …]
A Dk3-j7200-main.dtsi665 ti,otap-del-sel-ddr52 = <0x6>;
666 ti,otap-del-sel-hs200 = <0x8>;
667 ti,otap-del-sel-hs400 = <0x5>;
670 ti,itap-del-sel-ddr52 = <0x3>;
671 ti,strobe-sel = <0x77>;
672 ti,clkbuf-sel = <0x7>;
690 ti,otap-del-sel-sd-hs = <0x0>;
691 ti,otap-del-sel-sdr12 = <0xf>;
692 ti,otap-del-sel-sdr25 = <0xf>;
693 ti,otap-del-sel-sdr50 = <0xc>;
[all …]
A Dk3-am64-main.dtsi639 ti,clkbuf-sel = <0x7>;
643 ti,otap-del-sel-ddr52 = <0x6>;
644 ti,otap-del-sel-hs200 = <0x7>;
647 ti,itap-del-sel-ddr52 = <0x3>;
659 ti,clkbuf-sel = <0x7>;
661 ti,otap-del-sel-sd-hs = <0x0>;
662 ti,otap-del-sel-sdr12 = <0xf>;
663 ti,otap-del-sel-sdr25 = <0xf>;
664 ti,otap-del-sel-sdr50 = <0xc>;
666 ti,otap-del-sel-ddr50 = <0x9>;
[all …]
A Dk3-am65-main.dtsi446 ti,clkbuf-sel = <0x7>;
450 ti,otap-del-sel-ddr52 = <0x5>;
451 ti,otap-del-sel-hs200 = <0x5>;
454 ti,itap-del-sel-ddr52 = <0x0>;
466 ti,clkbuf-sel = <0x7>;
469 ti,otap-del-sel-sd-hs = <0x0>;
470 ti,otap-del-sel-sdr12 = <0xf>;
471 ti,otap-del-sel-sdr25 = <0xf>;
472 ti,otap-del-sel-sdr50 = <0x8>;
474 ti,otap-del-sel-ddr50 = <0x4>;
[all …]
/arch/alpha/kernel/
A Dtime.c206 unsigned char x, sel = 0; in common_init_rtc() local
214 sel = RTC_REF_CLCK_32KHZ + 6; in common_init_rtc()
217 sel = RTC_REF_CLCK_32KHZ + __builtin_ffs(32768 / CONFIG_HZ); in common_init_rtc()
221 if (sel) { in common_init_rtc()
223 CONFIG_HZ, sel); in common_init_rtc()
224 CMOS_WRITE(sel, RTC_FREQ_SELECT); in common_init_rtc()
/arch/mips/kvm/
A Dvz.c881 u32 rt, rd, sel; in kvm_vz_gpsi_cop0() local
905 sel = inst.c0r_format.sel; in kvm_vz_gpsi_cop0()
911 cop0->stat[rd][sel]++; in kvm_vz_gpsi_cop0()
927 sel == 1 && /* MAAR */ in kvm_vz_gpsi_cop0()
951 val = cop0->reg[rd][sel]; in kvm_vz_gpsi_cop0()
955 val = cop0->reg[rd][sel]; in kvm_vz_gpsi_cop0()
977 cop0->stat[rd][sel]++; in kvm_vz_gpsi_cop0()
1003 sel == 1 && /* MAAR */ in kvm_vz_gpsi_cop0()
1020 (sel == 6)) { in kvm_vz_gpsi_cop0()
1218 int rd, rt, sel; in kvm_trap_vz_handle_gpsi() local
[all …]
/arch/arm/plat-orion/
A Dmpp.c48 unsigned int sel = MPP_SEL(*mpp_list); in orion_mpp_conf() local
65 mpp_ctrl[num / 8] |= sel << shift; in orion_mpp_conf()
/arch/arm64/boot/dts/qcom/
A Dmsm8916-thwc-ufi001c.dts45 esim-sel-pins {
59 sim-sel-pins {
/arch/x86/boot/
A Dvideo.c203 unsigned int sel; in mode_menu() local
224 sel = get_entry(); in mode_menu()
225 if (sel != SCAN) in mode_menu()
226 return sel; in mode_menu()
/arch/arm/boot/dts/aspeed/
A Daspeed-bmc-ampere-mtjefferson.dts568 "chassis-id-sel",
569 /*C0-C7*/ "s0-vrd-fault-n","","bmc-debug-mode","","cpld-3v3-irq-n","","vrd-sel",
570 "spd-sel",
578 /*H0-H7*/ "jtag-program-sel","jtag-cmpl2","wd-disable-n","power-chassis-good","","",
586 /*N0-N7*/ "hpm-fw-recovery","hpm-stby-rst-n","jtag-sel-s0","led-sw-hb",
600 "bmc-ok","bmc-ready","spi0-program-sel","spi0-backup-sel",
617 /*18B0-18B7*/ "","","","","s0-soc-pgood","vga-ft-press-n","emmc-rst-n","s01-uart1-sel",
/arch/arm64/boot/dts/renesas/
A Drzg2ul-smarc.dtsi52 sd0-pwr-sel-hog {
59 sd1-pwr-sel-hog {
/arch/arm/boot/dts/samsung/
A Dexynos4412-i9300.dts26 fm-sel-gpios = <&gpl0 3 GPIO_ACTIVE_HIGH>;

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