Searched refs:setbits8 (Results 1 – 10 of 10) sorted by relevance
| /arch/powerpc/platforms/85xx/ |
| A D | t1042rdb_diu.c | 59 setbits8(cpld_base + CPLD_DIUCSR, 0x01 << 8); in t1042rdb_set_monitor_port()
60 setbits8(cpld_base + CPLD_DIUCSR, 0x01 << 4); in t1042rdb_set_monitor_port()
61 setbits8(cpld_base + CPLD_DIUCSR, CPLD_DIUCSR_BACKLIGHT); in t1042rdb_set_monitor_port()
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| A D | mpc85xx_mds.c | 181 setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); in mpc85xx_mds_reset_ucc_phys()
182 setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); in mpc85xx_mds_reset_ucc_phys()
194 setbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); in mpc85xx_mds_reset_ucc_phys()
196 setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); in mpc85xx_mds_reset_ucc_phys()
221 setbits8(&bcsr_regs[11], BCSR11_ENET_MICRST); in mpc85xx_mds_reset_ucc_phys()
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| A D | p1023_rdb.c | 71 setbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG2); in p1023_rdb_setup_arch()
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| A D | p1022_ds.c | 310 setbits8(pixis + PX_CTL, PX_CTL_ALTACC); in p1022ds_set_monitor_port()
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| /arch/powerpc/platforms/82xx/ |
| A D | ep8248e.c | 62 setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK); in ep8248e_set_mdc()
75 setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ); in ep8248e_set_mdio_dir()
84 setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA); in ep8248e_set_mdio_data()
271 setbits8(&ep8248e_bcsr[7], BCSR7_SCC2_ENABLE); in ep8248e_setup_arch()
272 setbits8(&ep8248e_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER | in ep8248e_setup_arch()
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| /arch/powerpc/platforms/52xx/ |
| A D | mpc52xx_common.c | 277 setbits8(&wkup_gpio->wkup_gpioe, reset); in mpc5200_psc_ac97_gpio_reset()
280 setbits8(&wkup_gpio->wkup_ddr, reset); in mpc5200_psc_ac97_gpio_reset()
291 setbits8(&wkup_gpio->wkup_dvo, reset); in mpc5200_psc_ac97_gpio_reset()
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| /arch/powerpc/platforms/8xx/ |
| A D | ep88xc.c | 140 setbits8(&ep88xc_bcsr[7], BCSR7_SCC2_ENABLE); in ep88xc_setup_arch()
141 setbits8(&ep88xc_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER | in ep88xc_setup_arch()
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| /arch/powerpc/platforms/44x/ |
| A D | canyonlands.c | 86 setbits8(&bcsr[7], BCSR_USB_EN); in ppc460ex_canyonlands_fixup()
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| /arch/powerpc/sysdev/ |
| A D | fsl_gtm.c | 212 setbits8(tmr->gtcfr, GTCFR_STP(num)); in gtm_set_ref_timer16()
310 setbits8(tmr->gtcfr, GTCFR_STP(num)); in gtm_stop_timer16()
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| /arch/powerpc/include/asm/ |
| A D | io.h | 936 #define setbits8(_addr, _v) out_8((_addr), in_8(_addr) | (_v)) macro
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