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Searched refs:sev_status (Results 1 – 15 of 15) sorted by relevance

/arch/x86/coco/
A Dcore.c74 if (sev_status & MSR_AMD64_SNP_VTOM) in amd_cc_platform_has()
82 return sme_me_mask && !(sev_status & MSR_AMD64_SEV_ENABLED); in amd_cc_platform_has()
85 return sev_status & MSR_AMD64_SEV_ENABLED; in amd_cc_platform_has()
88 return sev_status & MSR_AMD64_SEV_ES_ENABLED; in amd_cc_platform_has()
95 return (sev_status & MSR_AMD64_SEV_ENABLED) && in amd_cc_platform_has()
96 !(sev_status & MSR_AMD64_SEV_ES_ENABLED); in amd_cc_platform_has()
99 return sev_status & MSR_AMD64_SEV_SNP_ENABLED; in amd_cc_platform_has()
102 return sev_status & MSR_AMD64_SNP_SECURE_TSC; in amd_cc_platform_has()
139 if (sev_status & MSR_AMD64_SNP_VTOM) in cc_mkenc()
155 if (sev_status & MSR_AMD64_SNP_VTOM) in cc_mkdec()
/arch/x86/boot/compressed/
A Dsev.c80 return sev_status & MSR_AMD64_SEV_SNP_ENABLED; in sev_snp_enabled()
266 unsupported = snp_get_unsupported_features(sev_status); in snp_check_features()
440 sev_status = m.q; in sev_enable()
441 if (!(sev_status & MSR_AMD64_SEV_ENABLED)) in sev_enable()
445 if (sev_status & MSR_AMD64_SEV_ES_ENABLED) { in sev_enable()
454 if (sev_status & MSR_AMD64_SEV_SNP_ENABLED) { in sev_enable()
483 if (snp && !(sev_status & MSR_AMD64_SEV_SNP_ENABLED)) in sev_enable()
A Didt_64.c71 if (sev_status & BIT(1)) in load_stage2_idt()
A Dmem_encrypt.S261 movl (sev_status - 0b)(%ebp), %eax
312 SYM_DATA(sev_status, .quad 0)
A Dmisc.c384 if (sev_status & MSR_AMD64_SEV_ES_ENABLED) in early_sev_detect()
A Dhead_64.S195 movl $1, rva(sev_status)(%ebp)
/arch/x86/mm/
A Dmem_encrypt_amd.c44 u64 sev_status __section(".data") = 0;
45 SYM_PIC_ALIAS(sev_status);
508 if (sev_status & MSR_AMD64_SEV_ES_ENABLED) in sme_early_init()
518 if (sev_status & MSR_AMD64_SEV_ENABLED) in sme_early_init()
525 if (sev_status & MSR_AMD64_SEV_SNP_ENABLED) { in sme_early_init()
545 if (sev_status & MSR_AMD64_SNP_SECURE_TSC) in sme_early_init()
/arch/x86/include/asm/
A Dmem_encrypt.h32 extern u64 sev_status;
72 #define sev_status 0ULL macro
/arch/x86/kernel/
A Dsev_verify_cbit.S30 movq sev_status(%rip), %rsi
/arch/x86/boot/startup/
A Dsev-startup.c230 if (!(sev_status & MSR_AMD64_SEV_SNP_ENABLED)) in early_snp_set_memory_private()
249 if (!(sev_status & MSR_AMD64_SEV_SNP_ENABLED)) in early_snp_set_memory_shared()
A Dsme.c300 if (!sme_get_me_mask() || sev_status & MSR_AMD64_SEV_ENABLED) in sme_encrypt_kernel()
526 sev_status = msr = native_rdmsrq(MSR_AMD64_SEV); in sme_enable()
/arch/x86/coco/sev/
A Dvc-handle.c419 if (sev_status & MSR_AMD64_SNP_SECURE_TSC) in vc_handle_msr()
655 if (sev_status & MSR_AMD64_SNP_DEBUG_SWAP) in vc_handle_dr7_write()
695 if (sev_status & MSR_AMD64_SNP_DEBUG_SWAP) in vc_handle_dr7_read()
A Dvc-shared.c487 if (sev_status & MSR_AMD64_SNP_SECURE_TSC) in vc_handle_rdtsc()
A Dcore.c985 vmsa->sev_features = sev_status >> 2; in wakeup_cpu_via_vmgexit()
1583 if (sev_status & BIT_ULL(i)) { in sev_show_status()
/arch/x86/hyperv/
A Divm.c347 vmsa->sev_features = sev_status >> 2; in hv_snp_boot_ap()
651 sev_status = MSR_AMD64_SNP_VTOM; in hv_vtom_init()

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