Searched refs:sharing (Results 1 – 14 of 14) sorted by relevance
| /arch/arm64/boot/dts/marvell/ |
| A D | cn9130-db.dts | 15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
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| A D | cn9131-db.dts | 15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
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| A D | cn9132-db-B.dts | 15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
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| A D | cn9132-db.dts | 15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
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| A D | cn9130-db-B.dts | 15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
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| A D | cn9131-db-B.dts | 15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
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| /arch/arm/mach-omap2/ |
| A D | control.c | 57 u16 sharing; member
280 sdrc_block_contents.sharing = in omap3_save_scratchpad_contents()
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| /arch/arm64/boot/dts/mediatek/ |
| A D | mt8365-evk.dts | 184 * Ethernet and HDMI (DPI0) are sharing pins.
270 * Ethernet and HDMI (DPI0) are sharing pins.
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| A D | mt8192-asurada.dtsi | 330 /* Realtek RT5682i or RT5682s, sharing the same configuration */
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| A D | mt8195-cherry.dtsi | 530 /* Realtek RT5682i or RT5682s, sharing the same configuration */
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| /arch/arc/ |
| A D | Kconfig | 129 Shared Address Spaces (for sharing TLB entries in MMU)
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| /arch/arm64/ |
| A D | Kconfig | 861 A510 CPUs are using shared neon hardware. As the sharing is not
1521 by sharing mid-level caches, last-level cache tags or internal
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| /arch/x86/ |
| A D | Kconfig | 1042 by sharing mid-level caches, last-level cache tags or internal
1145 Only affects "broken" chipsets. Interrupt sharing may be
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| /arch/arm/ |
| A D | Kconfig | 1333 between threads sharing the same address space if they invoke
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