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Searched refs:src2 (Results 1 – 25 of 48) sorted by relevance

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/arch/powerpc/include/asm/
A Dkvm_fpu.h18 extern void fps_fadds(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2);
19 extern void fps_fdivs(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2);
20 extern void fps_fmuls(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2);
21 extern void fps_fsubs(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2);
23 extern void fps_fmadds(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2,
25 extern void fps_fmsubs(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2,
31 extern void fps_fsel(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2,
37 u64 *dst, u64 *src1, u64 *src2);
39 u64 *dst, u64 *src1, u64 *src2, u64 *src3);
41 extern void fpd_fcmpu(u64 *fpscr, u32 *cr, u64 *src1, u64 *src2);
[all …]
/arch/arm64/lib/
A Dmemcmp.S21 #define src2 x1 macro
40 ldr data2, [src2], 8
48 ldr data2, [src2, limit]
53 ldr data2, [src2], 8
71 sub src2, src2, tmp1
79 ldp data2, data2h, [src2], 16
95 add src2, src2, limit
97 ldp data2, data2h, [src2]
122 ldr data2w, [src2], 4
131 ldrb data2w, [src2], 1
A Dstrncmp.S25 #define src2 x1 macro
63 eor tmp1, src1, src2
76 ldr data2, [src2], #8
165 bic src2, src2, #7
168 ldr data2, [src2], #8
187 ldrb data2w, [src2], #1
206 ldrb data2w, [src2], #1
233 lsl offset, src2, #3
234 bic src2, src2, #0xf
238 ldp tmp1, tmp2, [src2], #16
[all …]
A Dstrcmp.S24 #define src2 x1 macro
57 sub off2, src2, src1
114 neg shift, src2, lsl 3 /* Bits to alignment -64. */
127 ldrb data2w, [src2], 1
135 neg shift, src2, lsl 3
136 bic src2, src2, 7
137 ldr data3, [src2], 8
148 sub off1, src2, src1
/arch/arc/kernel/
A Dunaligned.c140 set_reg(state->wb_reg, state->src1 + state->src2, regs, cregs); in fixup_load()
143 state->src2 = 0; in fixup_load()
147 get32_unaligned_check(val, state->src1 + state->src2); in fixup_load()
149 get16_unaligned_check(val, state->src1 + state->src2); in fixup_load()
168 set_reg(state->wb_reg, state->src2 + state->src3, regs, cregs); in fixup_store()
174 set_reg(state->wb_reg, state->src2 + (state->src3 << 1), in fixup_store()
177 set_reg(state->wb_reg, state->src2 + (state->src3 << 2), in fixup_store()
186 put32_unaligned_check(state->src1, state->src2 + state->src3); in fixup_store()
188 put16_unaligned_check(state->src1, state->src2 + state->src3); in fixup_store()
A Ddisasm.c117 state->src2 = FIELD_s9(state->words[0]); in disasm_instr()
140 state->src2 = state->words[1]; in disasm_instr()
224 state->src2 = FIELD_C(state->words[0]); in disasm_instr()
225 if (state->src2 == REG_LIMM) { in disasm_instr()
227 state->src2 = state->words[1]; in disasm_instr()
229 state->src2 = get_reg(state->src2, regs, in disasm_instr()
329 state->src2 = FIELD_S_u7(state->words[0]); in disasm_instr()
347 state->src2 = FIELD_S_u6(state->words[0]); in disasm_instr()
376 state->src2 = FIELD_S_u7(state->words[0]); in disasm_instr()
381 state->src2 = get_reg(28, regs, cregs); in disasm_instr()
[all …]
/arch/m68k/math-emu/
A Dmulti_arith.h117 struct fp_ext *src2) in fp_submant() argument
121 : "g,d" (src2->lowmant), "0,0" (src1->lowmant)); in fp_submant()
123 : "d" (src2->mant.m32[1]), "0" (src1->mant.m32[1])); in fp_submant()
125 : "d" (src2->mant.m32[0]), "0" (src1->mant.m32[0])); in fp_submant()
128 #define fp_mul64(desth, destl, src1, src2) ({ \ argument
130 : "dm" (src1), "0" (src2)); \
135 #define fp_add64(dest1, dest2, src1, src2) ({ \ argument
137 : "dm,d" (src2), "0,0" (dest2)); \
168 struct fp_ext *src2) in fp_multiplymant() argument
175 fp_mul64(temp.m32[0], temp.m32[1], src1->mant.m32[0], src2->mant.m32[1]); in fp_multiplymant()
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A Dfp_log.c28 struct fp_ext tmp, src2; in fp_fsqrt() local
61 fp_copy_ext(&src2, dest); in fp_fsqrt()
87 fp_copy_ext(&tmp, &src2); in fp_fsqrt()
/arch/xtensa/lib/
A Dumulsidi3.S199 .macro mul_mulsi3_body dst, src1, src2, tmp1, tmp2
201 1: add \tmp1, \src2, \dst
205 do_addx2 \tmp1, \src2, \dst, \tmp1
209 do_addx4 \tmp1, \src2, \dst, \tmp1
213 do_addx8 \tmp1, \src2, \dst, \tmp1
218 slli \src2, \src2, 4
/arch/sparc/kernel/
A Dvisemul.c604 s16 src2 = (rs2 >> (byte * 16)) & 0xffff; in pmul() local
605 u32 prod = src1 * src2; in pmul()
621 s16 src2; in pmul() local
627 src2 = rs2 >> (opf == FMUL8x16AU_OPF ? 16 : 0); in pmul()
630 u32 prod = src1 * src2; in pmul()
654 s16 src2; in pmul() local
659 src2 = ((rs2 >> (16 * byte)) & 0xffff); in pmul()
660 prod = src1 * src2; in pmul()
684 s16 src2; in pmul() local
689 src2 = ((rs2 >> (16 * byte)) & 0xffff); in pmul()
[all …]
/arch/x86/crypto/
A Daes-gcm-aesni-x86_64.S155 .macro _vpclmulqdq imm, src1, src2, dst
157 vpclmulqdq \imm, \src1, \src2, \dst
159 movdqa \src2, \dst
166 .macro _vpshufb src1, src2, dst
168 vpshufb \src1, \src2, \dst
170 movdqa \src2, \dst
177 .macro _vpand src1, src2, dst
179 vpand \src1, \src2, \dst
182 pand \src2, \dst
A Daes-xts-avx-x86_64.S254 .macro _vpxor src1, src2, dst
256 vpxor \src1, \src2, \dst
258 vpxord \src1, \src2, \dst
263 .macro _xor3 src1, src2, src3_and_dst
266 vpternlogd $0x96, \src1, \src2, \src3_and_dst
269 vpxor \src2, \src3_and_dst, \src3_and_dst
A Daes-ctr-avx-x86_64.S108 .macro _vpxor src1, src2, dst
110 vpxor \src1, \src2, \dst
112 vpxord \src1, \src2, \dst
/arch/powerpc/mm/book3s64/
A Dslice.c401 const struct slice_mask *src2) in slice_or_mask() argument
403 dst->low_slices = src1->low_slices | src2->low_slices; in slice_or_mask()
406 bitmap_or(dst->high_slices, src1->high_slices, src2->high_slices, SLICE_NUM_HIGH); in slice_or_mask()
411 const struct slice_mask *src2) in slice_andnot_mask() argument
413 dst->low_slices = src1->low_slices & ~src2->low_slices; in slice_andnot_mask()
416 bitmap_andnot(dst->high_slices, src1->high_slices, src2->high_slices, SLICE_NUM_HIGH); in slice_andnot_mask()
/arch/parisc/math-emu/
A Dsgl_float.h28 #define Sgl_and_signs( src1dst, src2) \ argument
29 Sall(src1dst) = (Sall(src2)|~((unsigned int)1<<31)) & Sall(src1dst)
30 #define Sgl_or_signs( src1dst, src2) \ argument
31 Sall(src1dst) = (Sall(src2)&((unsigned int)1<<31)) | Sall(src1dst)
A Ddbl_float.h29 #define Dbl_and_signs( src1dst, src2) \ argument
30 Dallp1(src1dst) = (Dallp1(src2)|~((unsigned int)1<<31)) & Dallp1(src1dst)
31 #define Dbl_or_signs( src1dst, src2) \ argument
32 Dallp1(src1dst) = (Dallp1(src2)&((unsigned int)1<<31)) | Dallp1(src1dst)
718 #define Dbl_copyto_dblext(src1,src2,dest1,dest2,dest3,dest4) \ argument
719 Dextallp1(dest1) = Dallp1(src1); Dextallp2(dest2) = Dallp2(src2); \
/arch/arm64/boot/dts/renesas/
A Dulcb-simple-audio-card-mix+split.dtsi93 playback = <&src2 &ctu03 &mix0 &dvc0 &ssi0>;
A Dulcb-audio-graph-card-mix+split.dtsi91 playback = <&src2 &ctu03 &mix0 &dvc0 &ssi0>;
A Dulcb-audio-graph-card2-mix+split.dtsi108 playback = <&src2 &ctu03 &mix0 &dvc0 &ssi0>;
/arch/arc/include/asm/
A Ddisasm.h85 int src1, src2, src3, dest, wb_reg; member
/arch/x86/kvm/
A Demulate.c405 #define FOP3E(op, dst, src, src2) \ argument
406 __FOP_FUNC(#op "_" #dst "_" #src "_" #src2) \
407 #op " %" #src2 ", %" #src ", %" #dst " \n\t"\
408 __FOP_RET(#op "_" #dst "_" #src "_" #src2)
1949 int seg = ctxt->src2.val; in em_push_sreg()
1962 int seg = ctxt->src2.val; in em_pop_sreg()
2311 int seg = ctxt->src2.val; in em_lseg()
3191 ctxt->dst.val = ctxt->src2.val; in em_imul_3op()
5087 : "c"(ctxt->src2.val)); in fastop()
5218 if (ctxt->src2.type == OP_MEM) { in x86_emulate_insn()
[all …]
A Dkvm_emulate.h380 struct operand src2; member
/arch/arm/boot/dts/renesas/
A Diwg20d-q7-common.dtsi330 capture = <&ssi0>, <&src2>, <&dvc0>;
/arch/arm/boot/dts/ti/omap/
A Dam43xx-clocks.dtsi814 clkout1_src2_mux_ck: clock-clkout1-src2-mux-ck {
824 clkout1_src2_pre_div_ck: clock-clkout1-src2-pre-div-ck {
834 clkout1_src2_post_div_ck: clock-clkout1-src2-post-div-ck {
/arch/riscv/net/
A Dbpf_jit_comp32.c564 static int emit_branch_r64(const s8 *src1, const s8 *src2, s32 rvoff, in emit_branch_r64() argument
572 const s8 *rs2 = bpf_get_reg64(src2, tmp2, ctx); in emit_branch_r64()
722 static int emit_branch_r32(const s8 *src1, const s8 *src2, s32 rvoff, in emit_branch_r32() argument
730 const s8 *rs2 = bpf_get_reg32(src2, tmp2, ctx); in emit_branch_r32()

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