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Searched refs:th (Results 1 – 20 of 20) sorted by relevance

/arch/arm/mach-aspeed/
A DKconfig15 bool "Aspeed SoC 4th Generation"
26 bool "Aspeed SoC 5th Generation"
35 bool "Aspeed SoC 6th Generation"
/arch/x86/realmode/
A Dinit.c73 static void __init sme_sev_setup_real_mode(struct trampoline_header *th) in sme_sev_setup_real_mode() argument
77 th->flags |= TH_FLAGS_SME_ACTIVE; in sme_sev_setup_real_mode()
84 th->start = (u64) secondary_startup_64_no_verify; in sme_sev_setup_real_mode()
/arch/alpha/lib/
A Dev67-strlen.S35 cmpbge $31, $1, $2 # E : $2 <- bitmask: bit i == 1 <==> i-th byte == 0
A Dstrlen.S30 cmpbge $31, $1, $2 # $2 <- bitmask: bit i == 1 <==> i-th byte == 0
/arch/x86/kernel/
A Dftrace_32.S137 pushl %esp # 4th argument: pt_regs
142 addl $4, %esp # skip 4th argument
/arch/mips/boot/dts/brcm/
A Dbcm3384_zephyr.dtsi18 /* On BMIPS5000 this is 1/8th of the CPU core clock */
/arch/arm/boot/dts/ti/omap/
A Dam335x-sbc-t335.dts31 fifo-th = <0>;
A Dam335x-pdu001.dts66 fifo-th = <0>;
A Dam335x-pepper.dts201 fifo-th = <0>;
A Dam335x-sl50.dts141 fifo-th = <0>;
A Dam335x-guardian.dts101 fifo-th = <0>;
/arch/arm/lib/
A Ddiv64.S115 @ (the 33th bit) this is a false positive so resume the loop.
/arch/arm/boot/dts/arm/
A Darm-realview-eb-mp.dtsi75 * since th outer sync operation can cause the
A Darm-realview-pb11mp.dts108 * since th outer sync operation can cause the
/arch/arm/boot/dts/ti/davinci/
A Dda850-evm.dts63 fifo-th = <1>;
/arch/m68k/fpsp040/
A Dsatan.S27 | of X with a bit-1 attached at the 6-th bit position. Define u
/arch/arm/boot/dts/nvidia/
A Dtegra30-cardhu.dtsi20 * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
/arch/
A DKconfig1370 Architecture has tls passed as the 4th argument of clone(2),
1371 not the 5th one.
1382 not the 5th one.
/arch/arm64/boot/dts/renesas/
A Dr8a779f0.dtsi488 /* The 4th sensor is in control domain and not for Linux */
/arch/m68k/ifpsp060/src/
A Dfpsp.S6165 # significant bits of X with a bit-1 attached at the 6-th #

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