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Searched refs:tr (Results 1 – 25 of 44) sorted by relevance

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/arch/x86/kernel/cpu/mce/
A Damd.c443 (tr->old_limit - tr->b->threshold_limit); in threshold_restart_bank()
455 if (tr->set_lvt_off) { in threshold_restart_bank()
456 if (lvt_off_valid(tr->b, tr->lvt_off, lo, hi)) { in threshold_restart_bank()
459 hi |= tr->lvt_off << 20; in threshold_restart_bank()
906 struct thresh_restart tr; in log_and_reset_block() local
922 memset(&tr, 0, sizeof(tr)); in log_and_reset_block()
923 tr.b = block; in log_and_reset_block()
995 memset(&tr, 0, sizeof(tr)); in SHOW_FIELDS()
996 tr.b = b; in SHOW_FIELDS()
1018 memset(&tr, 0, sizeof(tr)); in store_threshold_limit()
[all …]
/arch/powerpc/tools/
A Dftrace_check.sh25 cut -d' ' -f1 | tr '[:lower:]' '[:upper:]')
27 cut -d' ' -f1 | tr '[:lower:]' '[:upper:]')
29 cut -d' ' -f1 | tr '[:lower:]' '[:upper:]')
/arch/x86/crypto/
A Dcamellia_glue.c801 u32 dw, tl, tr; in camellia_setup_tail() local
914 tr = subRL[10] ^ rol32(dw, 1); in camellia_setup_tail()
915 tt = (tr | ((u64)tl << 32)); in camellia_setup_tail()
923 tr = subRL[7] ^ rol32(dw, 1); in camellia_setup_tail()
924 tt = (tr | ((u64)tl << 32)); in camellia_setup_tail()
934 tr = subRL[18] ^ rol32(dw, 1); in camellia_setup_tail()
935 tt = (tr | ((u64)tl << 32)); in camellia_setup_tail()
943 tr = subRL[15] ^ rol32(dw, 1); in camellia_setup_tail()
944 tt = (tr | ((u64)tl << 32)); in camellia_setup_tail()
959 tt = (tr | ((u64)tl << 32)); in camellia_setup_tail()
[all …]
/arch/x86/include/asm/
A Ddesc.h113 #define load_tr(tr) asm volatile("ltr %0"::"m" (tr)) argument
117 #define store_tr(tr) (tr = native_store_tr()) argument
285 unsigned long tr; in native_store_tr() local
287 asm volatile("str %0":"=r" (tr)); in native_store_tr()
289 return tr; in native_store_tr()
A Dsuspend_32.h23 unsigned long tr; member
A Dsuspend_64.h52 unsigned long tr; member
A Dparavirt.h276 #define store_tr(tr) ((tr) = paravirt_store_tr()) argument
A Dsvm.h323 struct vmcb_seg tr; member
375 struct vmcb_seg tr; member
/arch/powerpc/platforms/44x/
A Duic.c126 u32 tr, pr, mask; in uic_set_irq_type() local
152 tr = mfdcr(uic->dcrbase + UIC_TR); in uic_set_irq_type()
154 tr = (tr & mask) | (trigger << (31-src)); in uic_set_irq_type()
158 mtdcr(uic->dcrbase + UIC_TR, tr); in uic_set_irq_type()
/arch/s390/kernel/syscalls/
A Dsyscalltbl117 echo "$1" |tr '[[:lower:]]' '[[:upper:]]' \
123 local abis=$(echo "($1)" | tr ',' '|')
156 local abis=$(echo "($1)" | tr ',' '|')
/arch/x86/hyperv/
A Dhv_vtl.c186 input->vp_context.tr.selector = GDT_ENTRY_TSS * 8; in hv_vtl_bringup_vcpu()
187 input->vp_context.tr.base = hv_vtl_system_desc_base(tss); in hv_vtl_bringup_vcpu()
188 input->vp_context.tr.limit = hv_vtl_system_desc_limit(tss); in hv_vtl_bringup_vcpu()
189 input->vp_context.tr.attributes = 0x8b; in hv_vtl_bringup_vcpu()
/arch/mips/kernel/syscalls/
A Dsyscallnr.sh6 my_abis=`echo "($3)" | tr ',' '|'`
/arch/x86/kvm/
A Dsmm.h42 struct kvm_smm_seg_state_32 tr; member
89 struct kvm_smm_seg_state_64 tr; member
A Dsmm.c38 CHECK_SMRAM32_OFFSET(tr, 0xFF5C); in check_smram_offsets()
70 CHECK_SMRAM64_OFFSET(tr, 0xFE90); in check_smram_offsets()
201 enter_smm_save_seg_32(vcpu, &smram->tr, &smram->tr_sel, VCPU_SREG_TR); in enter_smm_save_state_32()
252 enter_smm_save_seg_64(vcpu, &smram->tr, VCPU_SREG_TR); in enter_smm_save_state_64()
478 rsm_load_seg_32(vcpu, &smstate->tr, smstate->tr_sel, VCPU_SREG_TR); in rsm_load_state_32()
535 rsm_load_seg_64(vcpu, &smstate->tr, VCPU_SREG_TR); in rsm_load_state_64()
/arch/powerpc/kvm/
A De500_mmu.c470 struct kvm_translation *tr) in kvmppc_core_vcpu_translate() argument
477 eaddr = tr->linear_address; in kvmppc_core_vcpu_translate()
478 pid = (tr->linear_address >> 32) & 0xff; in kvmppc_core_vcpu_translate()
479 as = (tr->linear_address >> 40) & 0x1; in kvmppc_core_vcpu_translate()
483 tr->valid = 0; in kvmppc_core_vcpu_translate()
487 tr->physical_address = kvmppc_mmu_xlate(vcpu, index, eaddr); in kvmppc_core_vcpu_translate()
489 tr->valid = 1; in kvmppc_core_vcpu_translate()
/arch/sh/include/asm/
A Dptrace.h59 {.name = __stringify(tr##num), .offset = offsetof(struct pt_regs, tregs[num])}
/arch/arm64/kvm/
A Dat.c669 struct kvm_s2_trans *tr) in compute_par_s12() argument
675 if (tr->esr) { in compute_par_s12()
679 par |= FIELD_PREP(SYS_PAR_EL1_FST, tr->esr); in compute_par_s12()
684 s2_memattr = FIELD_GET(GENMASK(5, 2), tr->desc); in compute_par_s12()
745 par |= tr->output & GENMASK(47, 12); in compute_par_s12()
748 compute_sh(final_attr, tr->desc))); in compute_par_s12()
/arch/mips/include/asm/txx9/
A Dtx4927.h81 u64 tr; member
/arch/x86/mm/
A Dfault.c557 u16 ldtr, tr; in show_fault_oops() local
580 store_tr(tr); in show_fault_oops()
581 show_ldttss(&gdt, "TR", tr); in show_fault_oops()
/arch/parisc/net/
A Dbpf_jit.h417 static inline u32 hppa_t5_insn(u8 opcode, u8 tr, u32 val21) in hppa_t5_insn() argument
419 return ((opcode << 26) | (tr << 21) | re_assemble_21(val21)); in hppa_t5_insn()
/arch/mips/txx9/generic/
A Dsetup_tx4927.c208 pr_cont(" TR:%09llx\n", ____raw_readq(&tx4927_sdramcptr->tr)); in tx4927_setup()
/arch/mips/kernel/
A Dgenex.S576 BUILD_HANDLER tr tr sti silent /* #13 */
/arch/x86/include/uapi/asm/
A Dkvm.h148 struct kvm_segment tr, ldt; member
159 struct kvm_segment tr, ldt; member
/arch/s390/boot/
A DMakefile78 …<" | sed -nE 's/^0*([0-9a-fA-F]+) 0*([0-9a-fA-F]+) [tT] ([^ ]*)$$/\1 \2 \3/p' | tr '\n' '\0' > "$@"
/arch/x86/power/
A Dcpu.c102 store_tr(ctxt->tr); in __save_processor_state()

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