Searched refs:ttbr1 (Results 1 – 9 of 9) sorted by relevance
| /arch/arm/mm/ |
| A D | proc-v7-3level.S | 117 .macro v7_ttb_setup, zero, ttbr0l, ttbr0h, ttbr1, tmp
119 cmp \ttbr1, \tmp, lsr #12 @ PHYS_OFFSET > PAGE_OFFSET?
132 mov \tmp, \ttbr1, lsr #20
133 mov \ttbr1, \ttbr1, lsl #12
134 addls \ttbr1, \ttbr1, #TTBR1_OFFSET
135 mcrr p15, 1, \ttbr1, \tmp, c2 @ load TTBR1
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| A D | proc-v7-2level.S | 146 .macro v7_ttb_setup, zero, ttbr0l, ttbr0h, ttbr1, tmp
150 ALT_SMP(orr \ttbr1, \ttbr1, #TTB_FLAGS_SMP)
151 ALT_UP(orr \ttbr1, \ttbr1, #TTB_FLAGS_UP)
152 mcr p15, 0, \ttbr1, c2, c0, 1 @ load TTB1
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| /arch/arm64/mm/ |
| A D | context.c | 351 unsigned long ttbr1 = read_sysreg(ttbr1_el1); in cpu_do_switch_mm() local
364 ttbr1 &= ~TTBR_ASID_MASK; in cpu_do_switch_mm()
365 ttbr1 |= FIELD_PREP(TTBR_ASID_MASK, asid); in cpu_do_switch_mm()
368 write_sysreg(ttbr1, ttbr1_el1); in cpu_do_switch_mm()
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| A D | mmu.c | 1577 phys_addr_t ttbr1 = phys_to_ttbr(virt_to_phys(pgdp)); in __cpu_replace_ttbr1() local
1580 ttbr1 |= TTBR_CNP_BIT; in __cpu_replace_ttbr1()
1591 replace_phys(ttbr1); in __cpu_replace_ttbr1()
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| /arch/arm64/include/asm/ |
| A D | uaccess.h | 76 unsigned long flags, ttbr0, ttbr1; in __uaccess_ttbr0_enable() local
87 ttbr1 = read_sysreg(ttbr1_el1); in __uaccess_ttbr0_enable()
88 ttbr1 &= ~TTBR_ASID_MASK; /* safety measure */ in __uaccess_ttbr0_enable()
89 ttbr1 |= ttbr0 & TTBR_ASID_MASK; in __uaccess_ttbr0_enable()
90 write_sysreg(ttbr1, ttbr1_el1); in __uaccess_ttbr0_enable()
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| A D | kexec.h | 115 phys_addr_t ttbr1; member
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| /arch/arm64/kernel/ |
| A D | machine_kexec.c | 138 kimage->arch.ttbr1 = __pa(trans_pgd); in machine_kexec_post_load()
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| A D | asm-offsets.c | 173 DEFINE(KIMAGE_ARCH_TTBR1, offsetof(struct kimage, arch.ttbr1)); in main()
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| /arch/arm64/kvm/ |
| A D | at.c | 456 u64 ttbr1; member
472 config->ttbr1 = read_sysreg_el1(SYS_TTBR1); in __mmu_config_save()
500 write_sysreg_el1(config->ttbr1, SYS_TTBR1); in __mmu_config_restore()
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