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Searched refs:uartclk (Results 1 – 25 of 81) sorted by relevance

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/arch/arm/mach-omap1/
A Dserial.c73 .uartclk = OMAP16XX_BASE_BAUD * 16,
81 .uartclk = OMAP16XX_BASE_BAUD * 16,
89 .uartclk = OMAP16XX_BASE_BAUD * 16,
112 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
113 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
114 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
/arch/arm64/boot/dts/arm/
A Dcorstone1000.dtsi87 uartclk: clock-50000000 { label
92 clock-output-names = "uartclk";
125 clocks = <&uartclk>, <&refclk100mhz>;
126 clock-names = "uartclk", "apb_pclk";
133 clocks = <&uartclk>, <&refclk100mhz>;
134 clock-names = "uartclk", "apb_pclk";
A Dfoundation-v8.dtsi204 clock-names = "uartclk", "apb_pclk";
212 clock-names = "uartclk", "apb_pclk";
220 clock-names = "uartclk", "apb_pclk";
228 clock-names = "uartclk", "apb_pclk";
A Drtsm_ve-motherboard.dtsi174 clock-names = "uartclk", "apb_pclk";
182 clock-names = "uartclk", "apb_pclk";
190 clock-names = "uartclk", "apb_pclk";
198 clock-names = "uartclk", "apb_pclk";
A Djuno-clocks.dtsi15 clock-output-names = "juno:uartclk";
/arch/mips/ath25/
A Ddevices.c74 void __init ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk) in ath25_serial_setup() argument
86 s.uartclk = uartclk; in ath25_serial_setup()
A Ddevices.h31 void ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk);
/arch/mips/mti-malta/
A Dmalta-platform.c34 .uartclk = 1843200, \
49 .uartclk = 3686400, /* Twice the usual clk! */
/arch/arm/boot/dts/hisilicon/
A Dhi3519.dtsi56 clock-names = "uartclk", "apb_pclk";
65 clock-names = "uartclk", "apb_pclk";
74 clock-names = "uartclk", "apb_pclk";
83 clock-names = "uartclk", "apb_pclk";
92 clock-names = "uartclk", "apb_pclk";
/arch/arm/mach-footbridge/
A Disa.c52 .uartclk = 1843200,
60 .uartclk = 1843200,
/arch/mips/loongson2ef/common/
A Dserial.c25 .uartclk = clk, \
34 .uartclk = clk, \
/arch/arm/boot/dts/arm/
A Darm-realview-eb.dtsi56 xtal24mhz: mclk: kmiclk: sspclk: uartclk: wdogclk: clock-24000000 {
333 clocks = <&uartclk>, <&pclk>;
334 clock-names = "uartclk", "apb_pclk";
340 clocks = <&uartclk>, <&pclk>;
341 clock-names = "uartclk", "apb_pclk";
347 clocks = <&uartclk>, <&pclk>;
348 clock-names = "uartclk", "apb_pclk";
354 clocks = <&uartclk>, <&pclk>;
355 clock-names = "uartclk", "apb_pclk";
A Darm-realview-pb1176.dts66 xtal24mhz: mclk: kmiclk: sspclk: uartclk: clock-24000000 {
389 clocks = <&uartclk>, <&pclk>;
390 clock-names = "uartclk", "apb_pclk";
398 clocks = <&uartclk>, <&pclk>;
399 clock-names = "uartclk", "apb_pclk";
407 clocks = <&uartclk>, <&pclk>;
408 clock-names = "uartclk", "apb_pclk";
416 clocks = <&uartclk>, <&pclk>;
417 clock-names = "uartclk", "apb_pclk";
525 clocks = <&uartclk>, <&pclk>;
[all …]
A Dintegratorcp.dts73 uartclk: clock-14745600 { label
249 clocks = <&uartclk>, <&pclk>;
250 clock-names = "uartclk", "apb_pclk";
255 clocks = <&uartclk>, <&pclk>;
256 clock-names = "uartclk", "apb_pclk";
279 clocks = <&uartclk>, <&pclk>;
A Darm-realview-pbx.dtsi65 xtal24mhz: mclk: kmiclk: sspclk: uartclk: wdogclk: clock-24000000 {
331 clocks = <&uartclk>, <&pclk>;
332 clock-names = "uartclk", "apb_pclk";
338 clocks = <&uartclk>, <&pclk>;
339 clock-names = "uartclk", "apb_pclk";
345 clocks = <&uartclk>, <&pclk>;
346 clock-names = "uartclk", "apb_pclk";
524 clocks = <&uartclk>, <&pclk>;
525 clock-names = "uartclk", "apb_pclk";
A Dintegratorap.dts67 uartclk: clock-14745600 { label
216 clocks = <&uartclk>, <&pclk>;
217 clock-names = "uartclk", "apb_pclk";
223 clocks = <&uartclk>, <&pclk>;
224 clock-names = "uartclk", "apb_pclk";
A Darm-realview-pb11mp.dts166 xtal24mhz: mclk: kmiclk: sspclk: uartclk: wdogclk: clock-24000000 {
481 clocks = <&uartclk>, <&pclk>;
482 clock-names = "uartclk", "apb_pclk";
490 clocks = <&uartclk>, <&pclk>;
491 clock-names = "uartclk", "apb_pclk";
499 clocks = <&uartclk>, <&pclk>;
500 clock-names = "uartclk", "apb_pclk";
508 clocks = <&uartclk>, <&pclk>;
509 clock-names = "uartclk", "apb_pclk";
/arch/mips/bcm47xx/
A Dserial.c44 p->uartclk = ssb_port->baud_base; in uart8250_init_ssb()
70 p->uartclk = bcma_port->baud_base; in uart8250_init_bcma()
/arch/sh/boards/mach-se/7343/
A Dsetup.c78 .uartclk = 7372800,
85 .uartclk = 7372800,
/arch/mips/rb532/
A Dserial.c50 rb532_uart.uartclk = idt_cpu_freq; in setup_serial_port()
/arch/mips/alchemy/common/
A Dplatform.c103 long uartclk; in alchemy_setup_uarts() local
115 uartclk = clk_get_rate(clk); in alchemy_setup_uarts()
128 ports[s].uartclk = uartclk; in alchemy_setup_uarts()
/arch/arm64/boot/dts/cix/
A Dsky1.dtsi200 clock-names = "uartclk", "apb_pclk";
209 clock-names = "uartclk", "apb_pclk";
218 clock-names = "uartclk", "apb_pclk";
227 clock-names = "uartclk", "apb_pclk";
/arch/mips/cobalt/
A Dserial.c32 .uartclk = 18432000,
/arch/xtensa/platforms/xtfpga/
A Dsetup.c251 .uartclk = 0, /* set in xtavnet_init() */
282 serial_platform_data[0].uartclk = *(long *)XTFPGA_CLKFRQ_VADDR; in xtavnet_init()
/arch/arm64/boot/dts/broadcom/bcmbca/
A Dbcm63158.dtsi270 clock-names = "uartclk", "apb_pclk";
279 clock-names = "uartclk", "apb_pclk";
288 clock-names = "uartclk", "apb_pclk";

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