Searched refs:ull (Results 1 – 25 of 26) sorted by relevance
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| /arch/parisc/lib/ |
| A D | ucmpdi2.c | 6 unsigned long long ull; member
15 union ull_union au = {.ull = a}; in __ucmpdi2()
16 union ull_union bu = {.ull = b}; in __ucmpdi2()
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| /arch/powerpc/include/asm/ |
| A D | spu.h | 379 #define MFC_CNTL_RESUME_DMA_QUEUE (0ull << 0)
383 #define MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION (0ull << 8)
579 #define MFC_LSACR_COMPARE_MASK ((~0ull) << 32)
580 #define MFC_LSACR_COMPARE_ADDR ((~0ull) >> 32)
585 #define MFC_LSCRR_QI_MASK ((~0ull) << MFC_LSCRR_QI_SHIFT)
630 #define SPU_ECC_CNTL_E (1ull << 0ull)
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| /arch/x86/include/asm/ |
| A D | processor-flags.h | 50 #define CR3_PCID_MASK 0ull
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| A D | pgtable-invert.h | 24 return __pte_needs_invert(val) ? ~0ull : 0; in protnone_mask()
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| A D | msr-index.h | 46 #define X86_MEMTYPE_UC 0ull /* Uncacheable, a.k.a. Strong Uncacheable */
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| /arch/mips/include/asm/octeon/ |
| A D | cvmx-pip.h | 47 CVMX_PIP_L4_NO_ERR = 0ull,
78 CVMX_PIP_IP_NO_ERR = 0ull,
102 CVMX_PIP_RX_NO_ERR = 0ull,
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| A D | cvmx-ciu-defs.h | 13 (CVMX_ADD_IO_SEG(0x0001070000000000ull + addr##ull) + \
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| A D | cvmx-pip-defs.h | 40 CVMX_PIP_PORT_CFG_MODE_NONE = 0ull,
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| /arch/powerpc/platforms/cell/spufs/ |
| A D | spu_utils.h | 15 unsigned long long ull; member
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| A D | switch.c | 835 u64 ull; in set_signot1() member
844 addr64.ull = (u64) csa->lscsa; in set_signot1()
853 u64 ull; in set_signot2() member
862 addr64.ull = (u64) csa->lscsa; in set_signot2()
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| A D | file.c | 144 __simple_attr_check_format(__fmt, 0ull); \
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| /arch/x86/kvm/ |
| A D | pmu.c | 586 u64 mask = ~0ull; in kvm_pmu_rdpmc()
771 pmu->global_ctrl_rsvd = ~0ull; in kvm_pmu_refresh()
772 pmu->global_status_rsvd = ~0ull; in kvm_pmu_refresh()
773 pmu->fixed_ctr_ctrl_rsvd = ~0ull; in kvm_pmu_refresh()
774 pmu->pebs_enable_rsvd = ~0ull; in kvm_pmu_refresh()
775 pmu->pebs_data_cfg_rsvd = ~0ull; in kvm_pmu_refresh()
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| A D | emulate.c | 38 #define OpNone 0ull
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| /arch/powerpc/mm/ |
| A D | init-common.c | 25 phys_addr_t memstart_addr __ro_after_init = (phys_addr_t)~0ull;
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| /arch/x86/kernel/cpu/mce/ |
| A D | threshold.c | 46 storm->banks[bank].history = ~0ull; in mce_inherit_storm()
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| /arch/x86/kvm/mmu/ |
| A D | spte.c | 499 shadow_nx_mask = 0ull; in kvm_mmu_set_ept_masks()
503 (has_exec_only ? 0ull : VMX_EPT_READABLE_MASK) | VMX_EPT_SUPPRESS_VE_BIT; in kvm_mmu_set_ept_masks()
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| /arch/x86/boot/ |
| A D | string.c | 275 if (unlikely(res & (~0ull << 60))) { in _parse_integer()
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| /arch/powerpc/kvm/ |
| A D | guest-state-buffer.c | 253 u64 mask = ~0ull; in kvmppc_gsid_mask()
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| A D | book3s_hv.c | 744 kvmhv_nestedv2_set_vpa(vcpu, ~0ull); in kvmppc_update_vpas()
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| /arch/mips/cavium-octeon/executive/ |
| A D | cvmx-bootmem.c | 272 address_max = ~0ull; /* If no limits given, use max limits */ in cvmx_bootmem_phy_alloc()
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| /arch/powerpc/platforms/powernv/ |
| A D | ocxl.c | 531 u64 val = 0ull; in pnv_ocxl_tlb_invalidate()
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| /arch/loongarch/kernel/ |
| A D | ptrace.c | 263 unsigned long long fill = ~0ull; in copy_pad_fprs()
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| /arch/mips/kernel/ |
| A D | ptrace.c | 608 unsigned long long fill = ~0ull; in copy_pad_fprs()
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| /arch/x86/events/intel/ |
| A D | core.c | 3085 wrmsrq_safe(x86_pmu_config_addr(idx), 0ull); in intel_pmu_reset()
3086 wrmsrq_safe(x86_pmu_event_addr(idx), 0ull); in intel_pmu_reset()
3091 wrmsrq_safe(x86_pmu_fixed_ctr_addr(idx), 0ull); in intel_pmu_reset()
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| /arch/x86/kvm/vmx/ |
| A D | vmx.c | 4036 msr_bitmap[read_idx] = ~0ull; in vmx_update_msr_bitmap_x2apic()
4037 msr_bitmap[write_idx] = ~0ull; in vmx_update_msr_bitmap_x2apic()
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