| /arch/arm64/crypto/ |
| A D | sha3-ce-glue.c | 93 .update = sha3_update,
105 .update = sha3_update,
117 .update = sha3_update,
129 .update = sha3_update,
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| A D | sm3-neon-glue.c | 43 .update = sm3_neon_update,
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| A D | sm3-ce-glue.c | 46 .update = sm3_ce_update,
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| A D | nhpoly1305-neon-glue.c | 53 .update = nhpoly1305_neon_update,
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| /arch/x86/kernel/cpu/resctrl/ |
| A D | rdtgroup.c | 134 void (*update)(void *arg); in set_cache_qos_cfg() local
144 update = l3_qos_cfg_update; in set_cache_qos_cfg()
146 update = l2_qos_cfg_update; in set_cache_qos_cfg()
165 on_each_cpu_mask(cpu_mask, update, &enable, 1); in set_cache_qos_cfg()
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| /arch/mips/cavium-octeon/executive/ |
| A D | cvmx-helper-jtag.c | 137 jtgd.s.update = 1; in cvmx_helper_qlm_jtag_update()
143 } while (jtgd.s.update); in cvmx_helper_qlm_jtag_update()
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| /arch/arm64/boot/dts/amlogic/ |
| A D | meson-gxm-wetek-core2.dts | 39 button-update {
40 label = "update";
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| A D | meson-g12b-a311d-khadas-vim3.dts | 30 * update these nodes accordingly if PCIe mode is selected by the MCU.
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| A D | meson-g12b-s922x-khadas-vim3.dts | 30 * update these nodes accordingly if PCIe mode is selected by the MCU.
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| A D | meson-gxm-gt1-ultimate.dts | 36 label = "update";
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| /arch/powerpc/kernel/trace/ |
| A D | ftrace.c | 377 int ret = 0, update; in ftrace_replace_code() local
388 update = ftrace_update_record(rec, enable); in ftrace_replace_code()
390 if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE) && update != FTRACE_UPDATE_IGNORE) { in ftrace_replace_code()
397 switch (update) { in ftrace_replace_code()
426 (update == FTRACE_UPDATE_MAKE_NOP || update == FTRACE_UPDATE_MAKE_CALL)) { in ftrace_replace_code()
433 if (update == FTRACE_UPDATE_MAKE_NOP) in ftrace_replace_code()
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| /arch/arm/lib/ |
| A D | csumpartial.S | 69 adcsne sum, sum, td0, put_byte_0 @ update checksum
80 adcsne sum, sum, td0, put_byte_1 @ update checksum
96 adcsne sum, sum, td0 @ update checksum
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| /arch/s390/crypto/ |
| A D | sha3_256_s390.c | 83 .update = s390_sha_update_blocks,
111 .update = s390_sha_update_blocks,
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| A D | sha3_512_s390.c | 82 .update = s390_sha_update_blocks,
112 .update = s390_sha_update_blocks,
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| /arch/powerpc/crypto/ |
| A D | aes-gcm-p10.S | 232 # Compute update single ghash
377 stxvb16x 32+30, 0, 7 # update IV
378 stxvb16x 32+0, 0, 8 # update Xi
442 std 5, 56(7) # update partial
561 std 12, 56(7) # update partial len
570 stxvb16x 32+30, 0, 7 # update IV
576 stxvb16x 32+0, 0, 8 # update Xi
892 stxvb16x 32+30, 0, 7 # update IV
893 stxvb16x 32+0, 0, 8 # update Xi
1190 stxvb16x 32+30, 0, 7 # update IV
[all …]
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| A D | md5-glue.c | 69 .update = ppc_md5_update,
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| /arch/arm/mm/ |
| A D | pv-fixup-asm.S | 64 adds r4, r4, r0 @ update physical address
68 adds r4, r4, r0 @ update physical address
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| /arch/arm/boot/dts/samsung/ |
| A D | exynos4412-prime.dtsi | 11 * non-Prime version. Therefore we need to update OPPs table and
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| /arch/riscv/crypto/ |
| A D | sm3-riscv64-glue.c | 61 .update = riscv64_sm3_update,
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| /arch/x86/crypto/ |
| A D | nhpoly1305-avx2-glue.c | 53 .update = nhpoly1305_avx2_update,
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| A D | nhpoly1305-sse2-glue.c | 53 .update = nhpoly1305_sse2_update,
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| A D | sm3_avx_glue.c | 51 .update = sm3_avx_update,
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| /arch/arm/crypto/ |
| A D | nhpoly1305-neon-glue.c | 53 .update = nhpoly1305_neon_update,
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| A D | blake2b-neon-glue.c | 63 .update = crypto_blake2b_update_neon, \
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| /arch/parisc/math-emu/ |
| A D | README | 5 enough to update our copies with later changes from HP-UX -- it'll
|