| /arch/xtensa/variants/test_kc705_be/include/variant/ |
| A D | tie.h | 116 XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0) \
131 XCHAL_SA_REG(s,0,0,1,0, ae_ovf_sar, 8, 4, 4,0x03F0, ur,240, 7,0,0,0) \
132 XCHAL_SA_REG(s,0,0,1,0, ae_bithead, 4, 4, 4,0x03F1, ur,241, 32,0,0,0) \
133 XCHAL_SA_REG(s,0,0,1,0,ae_ts_fts_bu_bp, 4, 4, 4,0x03F2, ur,242, 16,0,0,0) \
134 XCHAL_SA_REG(s,0,0,1,0, ae_sd_no, 4, 4, 4,0x03F3, ur,243, 28,0,0,0) \
135 XCHAL_SA_REG(s,0,0,1,0, ae_cbegin0, 4, 4, 4,0x03F6, ur,246, 32,0,0,0) \
136 XCHAL_SA_REG(s,0,0,1,0, ae_cend0, 4, 4, 4,0x03F7, ur,247, 32,0,0,0) \
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| /arch/xtensa/variants/test_kc705_hifi/include/variant/ |
| A D | tie.h | 116 XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0) \
131 XCHAL_SA_REG(s,0,0,1,0, ae_ovf_sar, 8, 4, 4,0x03F0, ur,240, 8,0,0,0) \
132 XCHAL_SA_REG(s,0,0,1,0, ae_bithead, 4, 4, 4,0x03F1, ur,241, 32,0,0,0) \
133 XCHAL_SA_REG(s,0,0,1,0,ae_ts_fts_bu_bp, 4, 4, 4,0x03F2, ur,242, 16,0,0,0) \
134 XCHAL_SA_REG(s,0,0,1,0, ae_cw_sd_no, 4, 4, 4,0x03F3, ur,243, 29,0,0,0) \
135 XCHAL_SA_REG(s,0,0,1,0, ae_cbegin0, 4, 4, 4,0x03F6, ur,246, 32,0,0,0) \
136 XCHAL_SA_REG(s,0,0,1,0, ae_cend0, 4, 4, 4,0x03F7, ur,247, 32,0,0,0) \
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| /arch/xtensa/variants/test_mmuhifi_c3/include/variant/ |
| A D | tie.h | 95 XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0)
102 XCHAL_SA_REG(s,0,0,1,0, ae_ovf_sar, 8, 4, 4,0x03F0, ur,240, 7,0,0,0) \
103 XCHAL_SA_REG(s,0,0,1,0, ae_bithead, 4, 4, 4,0x03F1, ur,241, 32,0,0,0) \
104 XCHAL_SA_REG(s,0,0,1,0,ae_ts_fts_bu_bp, 4, 4, 4,0x03F2, ur,242, 16,0,0,0) \
105 XCHAL_SA_REG(s,0,0,1,0, ae_sd_no, 4, 4, 4,0x03F3, ur,243, 28,0,0,0) \
|
| /arch/arm64/kvm/ |
| A D | at.c | 838 wr->ur = wr->uw = false; in compute_s1_direct_permissions()
845 wr->pw = wr->ur = wr->uw = false; in compute_s1_direct_permissions()
848 wr->pr = wr->ur = true; in compute_s1_direct_permissions()
857 wr->ur = wr->uw = wr->ux = false; in compute_s1_direct_permissions()
895 wr->ur = wr->uw = false; in compute_s1_hierarchical_permissions()
901 wr->pw = wr->ur = wr->uw = false; in compute_s1_hierarchical_permissions()
927 (wr)->ur = (r); \
1095 wr->ur &= uov_perms & POE_R; in compute_s1_overlay_permissions()
1125 pan = wi->pan && (wr->ur || wr->uw || in compute_s1_permissions()
1173 perm_fail = !wr.ur; in handle_at_slow()
[all …]
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| /arch/xtensa/variants/csp/include/variant/ |
| A D | tie.h | 113 XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0) \
|
| /arch/xtensa/variants/dc232b/include/variant/ |
| A D | tie.h | 101 XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0)
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| /arch/xtensa/variants/dc233c/include/variant/ |
| A D | tie.h | 113 XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0) \
|
| /arch/arm64/kvm/vgic/ |
| A D | vgic-mmio.h | 67 #define REGISTER_DESC_WITH_BITS_PER_IRQ(off, rd, wr, ur, uw, bpi, acc) \ argument
75 .uaccess_read = ur, \
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| A D | vgic-mmio-v3.c | 599 #define REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(off, rd, wr, ur, uw, bpi, acc) \ argument
614 .uaccess_read = ur, \
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| /arch/alpha/kernel/ |
| A D | osf_sys.c | 1110 struct rusage32 __user *, ur) in SYSCALL_DEFINE4() argument
1116 if (!ur) in SYSCALL_DEFINE4()
1118 if (put_tv_to_tv32(&ur->ru_utime, &r.ru_utime)) in SYSCALL_DEFINE4()
1120 if (put_tv_to_tv32(&ur->ru_stime, &r.ru_stime)) in SYSCALL_DEFINE4()
1122 if (copy_to_user(&ur->ru_maxrss, &r.ru_maxrss, in SYSCALL_DEFINE4()
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| /arch/arm64/include/asm/ |
| A D | kvm_nested.h | 317 bool ur; member
|