Home
last modified time | relevance | path

Searched refs:v16 (Results 1 – 25 of 27) sorted by relevance

12

/arch/riscv/crypto/
A Daes-riscv64-zvkned.S60 vle32.v v16, (INP)
61 aes_crypt v16, \enc, \keylen
62 vse32.v v16, (OUTP)
93 vle32.v v16, (INP)
95 vse32.v v16, (OUTP)
129 vxor.vv v16, v16, v17 // XOR with IV or prev ciphertext block
201 vxor.vv v16, v16, v17 // XOR with IV or prev ciphertext block
225 vxor.vv v16, v16, v17 // v16 = Encrypt(P[n-1] ^ C[n-2]) ^ P[n]
227 aes_encrypt v16, \keylen
244 vmv.v.v v28, v16 // IV
[all …]
A Daes-riscv64-zvkned-zvkb.S85 vmv.v.i v16, 0
86 vaesz.vs v16, v31
92 vadd.vv v16, v16, v20, v0.t
102 vadd.vx v16, v16, VL_BLOCKS, v0.t
105 vmv.v.v v24, v16
129 vadd.vx v16, v16, VL_BLOCKS, v0.t
130 vrev8.v v16, v16, v0.t // Convert counters back to big-endian.
131 vse32.v v16, (IVP)
A Daes-riscv64-zvkned-zvbb-zvkg.S66 #define TWEAKS v16 // LMUL=4 (most of the time)
/arch/riscv/lib/
A Dxor.S14 vxor.vv v16, v0, v8
16 vse8.v v16, (a1)
29 vle8.v v16, (a3)
31 vxor.vv v16, v0, v16
33 vse8.v v16, (a1)
46 vle8.v v16, (a3)
48 vxor.vv v0, v0, v16
53 vse8.v v16, (a1)
66 vle8.v v16, (a3)
68 vxor.vv v0, v0, v16
[all …]
/arch/arm64/crypto/
A Dsha3-ce-core.S50 ld1 {v16.1d-v19.1d}, [x8], #32
87 eor v16.8b, v16.8b, v28.8b
98 eor v16.8b, v16.8b, v28.8b
115 eor3 v26.16b, v26.16b, v16.16b, v21.16b
143 xar v4.2d, v16.2d, v25.2d, (64 - 45)
144 xar v16.2d, v5.2d, v30.2d, (64 - 36)
162 bcax v19.16b, v19.16b, v16.16b, v15.16b
163 bcax v15.16b, v15.16b, v25.16b, v16.16b
164 bcax v16.16b, v16.16b, v3.16b, v25.16b
195 st1 {v16.1d-v19.1d}, [x0], #32
A Daes-neon.S49 ld1 {v16.16b-v19.16b}, [\temp], #64
72 tbl \in\().16b, {v16.16b-v19.16b}, \in\().16b
129 tbl \in0\().16b, {v16.16b-v19.16b}, \in0\().16b
131 tbl \in1\().16b, {v16.16b-v19.16b}, \in1\().16b
133 tbl \in2\().16b, {v16.16b-v19.16b}, \in2\().16b
135 tbl \in3\().16b, {v16.16b-v19.16b}, \in3\().16b
A Daes-ce.S17 xtsmask .req v16
18 cbciv .req v16
19 vctr .req v16
A Dsm3-ce-core.S93 mov v16.16b, v9.16b
123 eor v9.16b, v9.16b, v16.16b
A Dsm4-neon-core.S35 ld1 {v16.16b-v19.16b}, [x5], #64; \
105 tbl RTMP0.16b, {v16.16b-v19.16b}, RX0.16b; \
174 tbl RTMP0.16b, {v16.16b-v19.16b}, RX0.16b; \
175 tbl RTMP1.16b, {v16.16b-v19.16b}, RX1.16b; \
A Daes-neonbs-core.S229 eor \x0\().16b, \x0\().16b, v16.16b
402 tbl v7.16b ,{v17.16b}, v16.16b
752 next_tweak v16, v31, v18, v19
753 next_tweak v17, v16, v18, v19
762 eor v7.16b, v7.16b, v16.16b
780 eor v16.16b, \o0\().16b, v25.16b
792 st1 {v16.16b-v19.16b}, [x0], #64
A Daes-ce-ccm-core.S40 .L\@: .irp v, v14, v15, v16, v17, v18, v19, v20, v21, v3
A Dsm4-ce-ccm-core.S27 #define RMAC v16
A Dpolyval-ce-core.S54 PL .req v16
A Dsm4-ce-core.S32 #define RTMP0 v16
76 tbl v16.16b, {v7.16b}, v24.16b
85 st1 {v16.16b-v19.16b}, [x2], #64
A Dsm4-ce-gcm-core.S256 #define RH1 v16
577 #define RTMP4 v16
A Dghash-ce-core.S31 t9 .req v16
55 HH .req v16
/arch/powerpc/lib/
A Dmemcpy_power7.S480 VPERM(v8,v0,v1,v16)
488 VPERM(v8,v0,v1,v16)
490 VPERM(v9,v1,v0,v16)
498 VPERM(v8,v0,v3,v16)
500 VPERM(v9,v3,v2,v16)
533 VPERM(v8,v0,v7,v16)
535 VPERM(v9,v7,v6,v16)
571 VPERM(v8,v0,v3,v16)
573 VPERM(v9,v3,v2,v16)
587 VPERM(v8,v0,v1,v16)
[all …]
A Dcopyuser_power7.S533 VPERM(v8,v0,v1,v16)
541 VPERM(v8,v0,v1,v16)
543 VPERM(v9,v1,v0,v16)
551 VPERM(v8,v0,v3,v16)
553 VPERM(v9,v3,v2,v16)
586 VPERM(v8,v0,v7,v16)
588 VPERM(v9,v7,v6,v16)
624 VPERM(v8,v0,v3,v16)
626 VPERM(v9,v3,v2,v16)
640 VPERM(v8,v0,v1,v16)
[all …]
/arch/m68k/coldfire/
A Dm528x.c89 u16 v16; in m528x_fec_init() local
92 v16 = readw(MCFGPIO_PASPAR); in m528x_fec_init()
93 writew(v16 | 0xf00, MCFGPIO_PASPAR); in m528x_fec_init()
/arch/x86/mm/
A Dtestmmiotrace.c23 static unsigned v16(unsigned i) in v16() function
43 iowrite16(v16(i), p + i); in do_write_test()
61 if (ioread16(p + i) != v16(i)) in do_read_test()
/arch/powerpc/platforms/powernv/
A Dpci.c597 __be16 v16; in pnv_pci_cfg_read() local
599 &v16); in pnv_pci_cfg_read()
600 *val = (rc == OPAL_SUCCESS) ? be16_to_cpu(v16) : 0xffff; in pnv_pci_cfg_read()
/arch/arm64/kernel/vdso/
A Dvgetrandom-chacha.S21 #define one_v v16
/arch/riscv/kernel/
A Dhead.S466 vmv.v.i v16, 0
/arch/s390/include/asm/
A Dfpu-insn-asm.h142 .ifc \vxr,%v16
/arch/powerpc/include/asm/
A Dppc_asm.h693 #define v16 16 macro

Completed in 43 milliseconds

12