| /arch/riscv/crypto/ |
| A D | aes-riscv64-zvkned-zvkb.S | 105 vmv.v.v v24, v16
106 vrev8.v v24, v24, v0.t // Convert counters back to big-endian.
109 aes_encrypt v24, \keylen
114 vxor.vv v20, v20, v24
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| A D | aes-riscv64-zvkned.S | 149 vslidedown.vx v24, v20, t1 // Save last ciphertext block
153 vmv.v.v v16, v24 // Next "IV" is last ciphertext block
261 vmv.v.v v24, v16 // Get IV or last ciphertext block of prev set
262 vslideup.vi v24, v20, 4 // Setup prev ciphertext blocks
265 vxor.vv v24, v24, v20 // XOR prev ciphertext blocks with decrypted blocks
266 vse32.v v24, (OUTP) // Store this set of plaintext blocks
292 vle32.v v24, (t1) // Decrypt(C[n-1]) ^ C[n-2]
294 vxor.vv v20, v24, v16 // Decrypt(C[n-1]) ^ C[n-2] ^ C[n] == P[n] ^ C[n-2]
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| A D | aes-riscv64-zvkned-zvbb-zvkg.S | 68 #define MULTS_BREV v24 // LMUL=4 (most of the time)
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| /arch/arm64/crypto/ |
| A D | sm4-ce-asm.h | 12 sm4e b0.4s, v24.4s; \
29 sm4e b0.4s, v24.4s; \
30 sm4e b1.4s, v24.4s; \
58 sm4e b0.4s, v24.4s; \
59 sm4e b1.4s, v24.4s; \
60 sm4e b2.4s, v24.4s; \
61 sm4e b3.4s, v24.4s; \
111 sm4e b0.4s, v24.4s; \
112 sm4e b1.4s, v24.4s; \
113 sm4e b2.4s, v24.4s; \
[all …]
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| A D | sha3-ce-core.S | 52 ld1 {v24.1d}, [x8]
114 eor3 v29.16b, v29.16b, v19.16b, v24.16b
140 xar v28.2d, v24.2d, v28.2d, (64 - 14)
141 xar v24.2d, v21.2d, v25.2d, (64 - 2)
154 bcax v22.16b, v22.16b, v24.16b, v23.16b
155 bcax v23.16b, v23.16b, v31.16b, v24.16b
156 bcax v24.16b, v24.16b, v8.16b, v31.16b
197 st1 {v24.1d}, [x0]
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| A D | aes-neon.S | 51 ld1 {v24.16b-v27.16b}, [\temp], #64
76 tbx \in\().16b, {v24.16b-v27.16b}, v10.16b
143 tbx \in0\().16b, {v24.16b-v27.16b}, v8.16b
145 tbx \in1\().16b, {v24.16b-v27.16b}, v9.16b
147 tbx \in2\().16b, {v24.16b-v27.16b}, v10.16b
149 tbx \in3\().16b, {v24.16b-v27.16b}, v11.16b
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| A D | sm4-ce-core.S | 55 ld1 {v24.16b-v27.16b}, [x4], #64;
61 sm4ekey v0.4s, v0.4s, v24.4s;
71 ld1 {v24.16b}, [x5]
76 tbl v16.16b, {v7.16b}, v24.16b
77 tbl v17.16b, {v6.16b}, v24.16b
78 tbl v18.16b, {v5.16b}, v24.16b
79 tbl v19.16b, {v4.16b}, v24.16b
80 tbl v20.16b, {v3.16b}, v24.16b
81 tbl v21.16b, {v2.16b}, v24.16b
82 tbl v22.16b, {v1.16b}, v24.16b
[all …]
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| A D | aes-neonbs-core.S | 681 ld1 {v24.16b}, [x24] // load IV
688 eor v0.16b, v0.16b, v24.16b
693 mov v24.16b, v25.16b
696 mov v24.16b, v26.16b
699 mov v24.16b, v27.16b
702 mov v24.16b, v28.16b
705 mov v24.16b, v29.16b
708 mov v24.16b, v30.16b
711 mov v24.16b, v31.16b
713 ld1 {v24.16b}, [x20], #16
[all …]
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| A D | aes-ce.S | 32 ld1 {v21.4s-v24.4s}, [\tmp], #64
114 .L\@: .irp key, v21, v22, v23, v24, v25, v26, v27, v28, v29
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| A D | sm4-neon-core.S | 37 ld1 {v24.16b-v27.16b}, [x5], #64; \
109 tbx RTMP0.16b, {v24.16b-v27.16b}, RX0.16b; \
182 tbx RTMP0.16b, {v24.16b-v27.16b}, RX0.16b; \
183 tbx RTMP1.16b, {v24.16b-v27.16b}, RX1.16b; \
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| A D | sm4-ce-gcm-core.S | 112 sm4e b0.4s, v24.4s; \
143 sm4e b0.4s, v24.4s; \
144 sm4e b1.4s, v24.4s; \
145 sm4e b2.4s, v24.4s; \
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| A D | polyval-ce-core.S | 61 GSTAR .req v24
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| A D | ghash-ce-core.S | 42 ss1 .req v24
370 INP3 .req v24
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| /arch/riscv/lib/ |
| A D | xor.S | 49 vle8.v v24, (a4)
51 vxor.vv v16, v0, v24
69 vle8.v v24, (a4)
71 vxor.vv v0, v0, v24
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| /arch/powerpc/lib/ |
| A D | crtsavres.S | 251 stvx v24,r11,r0
289 lvx v24,r11,r0
460 stvx v24,r12,r0
510 lvx v24,r12,r0
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| /arch/riscv/kernel/ |
| A D | head.S | 467 vmv.v.i v24, 0
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| /arch/s390/include/asm/ |
| A D | fpu-insn-asm.h | 166 .ifc \vxr,%v24
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| /arch/powerpc/include/asm/ |
| A D | ppc_asm.h | 701 #define v24 24 macro
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