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/arch/powerpc/boot/dts/fsl/
A Dqoriq-sec5.2-0.dtsi36 compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0";
46 "fsl,sec-v5.0-job-ring",
54 "fsl,sec-v5.0-job-ring",
62 "fsl,sec-v5.0-job-ring",
70 "fsl,sec-v5.0-job-ring",
77 compatible = "fsl,sec-v5.2-rtic",
78 "fsl,sec-v5.0-rtic",
87 "fsl,sec-v5.0-rtic-memory",
94 "fsl,sec-v5.0-rtic-memory",
101 "fsl,sec-v5.0-rtic-memory",
[all …]
A Dqoriq-sec5.3-0.dtsi36 compatible = "fsl,sec-v5.3", "fsl,sec-v5.0", "fsl,sec-v4.0";
46 "fsl,sec-v5.0-job-ring",
54 "fsl,sec-v5.0-job-ring",
62 "fsl,sec-v5.0-job-ring",
70 "fsl,sec-v5.0-job-ring",
77 compatible = "fsl,sec-v5.3-rtic",
78 "fsl,sec-v5.0-rtic",
87 "fsl,sec-v5.0-rtic-memory",
94 "fsl,sec-v5.0-rtic-memory",
101 "fsl,sec-v5.0-rtic-memory",
[all …]
A Dqoriq-sec5.0-0.dtsi36 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
45 compatible = "fsl,sec-v5.0-job-ring",
52 compatible = "fsl,sec-v5.0-job-ring",
59 compatible = "fsl,sec-v5.0-job-ring",
66 compatible = "fsl,sec-v5.0-job-ring",
73 compatible = "fsl,sec-v5.0-rtic",
81 compatible = "fsl,sec-v5.0-rtic-memory",
87 compatible = "fsl,sec-v5.0-rtic-memory",
93 compatible = "fsl,sec-v5.0-rtic-memory",
99 compatible = "fsl,sec-v5.0-rtic-memory",
[all …]
A Dqoriq-sec6.0-0.dtsi35 compatible = "fsl,sec-v6.0", "fsl,sec-v5.0",
43 "fsl,sec-v5.2-job-ring",
44 "fsl,sec-v5.0-job-ring",
52 "fsl,sec-v5.2-job-ring",
53 "fsl,sec-v5.0-job-ring",
/arch/loongarch/lib/
A Dxor_template.c88 const unsigned long * __restrict v5)
98 LD_AND_XOR_LINE(v5)
101 [v5] "r"(v5) : "memory"
108 v5 += LINE_WIDTH / sizeof(unsigned long);
/arch/arm64/crypto/
A Daes-modes.S191 mov v5.16b, v0.16b
205 mov v5.16b, v1.16b
525 ST5( eor v5.16b, v5.16b, v0.16b )
559 ld1 {v5.16b}, [IN]
566 eor v5.16b, v5.16b, v3.16b
568 st1 {v5.16b}, [OUT]
660 next_tweak v5, v4, v8
662 next_tweak v6, v5, v8
752 next_tweak v5, v4, v8
754 next_tweak v6, v5, v8
[all …]
A Dsm4-neon-core.S360 eor v5.16b, v5.16b, RTMP4.16b
382 rev32 v5.16b, v1.16b
391 eor v5.16b, v5.16b, v0.16b
411 rev32 v5.16b, v1.16b
424 eor v5.16b, v5.16b, v0.16b
426 st1 {v5.16b}, [x1], #16
472 inc_le128(v5) /* +5 */
488 eor v5.16b, v5.16b, RTMP5.16b
518 eor v1.16b, v1.16b, v5.16b
533 ld1 {v5.16b}, [x2], #16
[all …]
A Daes-neonbs-core.S415 not v5.16b, v5.16b
446 eor v15.16b, v5.16b, v9.16b
490 eor v5.16b, v5.16b, v12.16b
555 eor v5.16b, v5.16b, v12.16b
590 ld1 {v5.16b}, [x20], #16
669 ld1 {v5.16b}, [x20], #16
670 mov v30.16b, v5.16b
690 eor v5.16b, v5.16b, v31.16b
714 st1 {v5.16b}, [x19], #16
760 eor v5.16b, v5.16b, v30.16b
[all …]
A Dsha3-ce-core.S66 eor v5.8b, v5.8b, v30.8b
112 eor3 v25.16b, v0.16b, v5.16b, v10.16b
144 xar v16.2d, v5.2d, v30.2d, (64 - 36)
145 xar v5.2d, v3.2d, v27.2d, (64 - 28)
173 bcax v8.16b, v4.16b, v5.16b, v9.16b
174 bcax v9.16b, v9.16b, v6.16b, v5.16b
175 bcax v5.16b, v5.16b, v30.16b, v6.16b
A Daes-ce-ccm-core.S23 ld1 {v3.4s-v5.4s}, [\tmp]
67 eor v2.16b, v2.16b, v5.16b /* final round enc+mac */
71 eor v6.16b, v2.16b, v5.16b /* final round enc */
84 eor v0.16b, v0.16b, v5.16b /* final round mac */
85 eor v1.16b, v1.16b, v5.16b /* final round enc */
A Dsm4-ce-core.S66 sm4ekey v5.4s, v4.4s, v29.4s;
67 sm4ekey v6.4s, v5.4s, v30.4s;
78 tbl v18.16b, {v5.16b}, v24.16b
238 rev32 v13.16b, v5.16b
250 eor v14.16b, v14.16b, v5.16b
437 inc_le128(v5) /* +5 */
451 eor v5.16b, v5.16b, v13.16b
572 eor v5.16b, v5.16b, v13.16b
583 eor v5.16b, v5.16b, v13.16b
739 eor v5.16b, v5.16b, v13.16b
[all …]
A Dsm3-ce-core.S45 sm3ss1 v5.4s, v8.4s, \t0\().4s, v9.4s
48 sm3tt1\ab v8.4s, v5.4s, v10.4s, \i
49 sm3tt2\ab v9.4s, v5.4s, \s0\().4s, \i
A Dsm4-ce-cipher-core.S28 sm4e v8.4s, v5.4s
A Dpolyval-ce-core.S43 M5 .req v5
140 ext v5.16b, LO.16b, HI.16b, #8
142 eor v4.16b, v4.16b, v5.16b
/arch/arm64/boot/dts/freescale/
A Dfsl-ls1012a.dtsi191 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
203 "fsl,sec-v5.0-job-ring",
211 "fsl,sec-v5.0-job-ring",
219 "fsl,sec-v5.0-job-ring",
227 "fsl,sec-v5.0-job-ring",
234 compatible = "fsl,sec-v5.4-rtic",
235 "fsl,sec-v5.0-rtic",
244 "fsl,sec-v5.0-rtic-memory",
251 "fsl,sec-v5.0-rtic-memory",
258 "fsl,sec-v5.0-rtic-memory",
[all …]
A Dfsl-ls1046a.dtsi352 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
362 compatible = "fsl,sec-v5.4-job-ring",
363 "fsl,sec-v5.0-job-ring",
370 compatible = "fsl,sec-v5.4-job-ring",
371 "fsl,sec-v5.0-job-ring",
378 compatible = "fsl,sec-v5.4-job-ring",
379 "fsl,sec-v5.0-job-ring",
386 compatible = "fsl,sec-v5.4-job-ring",
387 "fsl,sec-v5.0-job-ring",
A Dfsl-ls1043a.dtsi348 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
359 compatible = "fsl,sec-v5.4-job-ring",
360 "fsl,sec-v5.0-job-ring",
367 compatible = "fsl,sec-v5.4-job-ring",
368 "fsl,sec-v5.0-job-ring",
375 compatible = "fsl,sec-v5.4-job-ring",
376 "fsl,sec-v5.0-job-ring",
383 compatible = "fsl,sec-v5.4-job-ring",
384 "fsl,sec-v5.0-job-ring",
/arch/arm/boot/dts/marvell/
A Darmada-388-gp.dts266 reg_usb2_0_vbus: v5-vbus0 {
268 regulator-name = "v5.0-vbus0";
276 reg_usb2_1_vbus: v5-vbus1 {
278 regulator-name = "v5.0-vbus1";
295 reg_5v_sata0: v5-sata0 {
297 regulator-name = "v5.0-sata0";
321 reg_5v_sata1: v5-sata1 {
323 regulator-name = "v5.0-sata1";
345 reg_5v_sata2: v5-sata2 {
347 regulator-name = "v5.0-sata2";
[all …]
/arch/powerpc/lib/
A Dxor_vmx.c135 DEFINE(v5); in __xor_altivec_5()
143 LOAD(v5); in __xor_altivec_5()
146 XOR(v1, v5); in __xor_altivec_5()
154 v5 += 4; in __xor_altivec_5()
A Dcopypage_power7.S63 lvx v5,r4,r7
72 stvx v5,r3,r7
A Dmemcpy_power7.S348 lvx v5,r4,r10
357 stvx v5,r3,r10
536 lvx v5,r4,r10
537 VPERM(v10,v6,v5,v16)
539 VPERM(v11,v5,v4,v16)
/arch/riscv/crypto/
A Daes-macros.S66 vle32.v v5, (\keyp)
101 vaesem.vs \data, v5
142 vaesdm.vs \data, v5
/arch/arm/boot/dts/xilinx/
A Dzynq-zturn-v5.dts8 compatible = "myir,zynq-zturn-v5", "xlnx,zynq-7000";
A DMakefile15 zynq-zturn-v5.dtb \
/arch/arm64/boot/dts/allwinner/
A Dsun50i-h5-nanopi-neo-plus2.dts51 reg_gmac_2v5: gmac-2v5 {
54 regulator-name = "gmac-2v5";

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