| /arch/mips/sni/ |
| A D | rm200.c | 194 writeb(0x0B, rm200_pic_master + PIC_CMD); in sni_rm200_i8259A_irq_real()
196 writeb(0x0A, rm200_pic_master + PIC_CMD); in sni_rm200_i8259A_irq_real()
201 writeb(0x0A, rm200_pic_slave + PIC_CMD); in sni_rm200_i8259A_irq_real()
246 writeb(0x60+irq, rm200_pic_master + PIC_CMD); in sni_rm200_mask_and_ack_8259A()
337 writeb(0xff, rm200_pic_master + PIC_IMR); in sni_rm200_init_8259A()
338 writeb(0xff, rm200_pic_slave + PIC_IMR); in sni_rm200_init_8259A()
340 writeb(0x11, rm200_pic_master + PIC_CMD); in sni_rm200_init_8259A()
341 writeb(0, rm200_pic_master + PIC_IMR); in sni_rm200_init_8259A()
344 writeb(0x11, rm200_pic_slave + PIC_CMD); in sni_rm200_init_8259A()
345 writeb(8, rm200_pic_slave + PIC_IMR); in sni_rm200_init_8259A()
[all …]
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| /arch/m68k/coldfire/ |
| A D | m528x.c | 82 writeb(port, MCFGPIO_PUAPAR); in m528x_uarts_init()
94 writeb(0xc0, MCFGPIO_PEHLPAR); in m528x_fec_init()
102 writeb(0, 0x30000007); in wildfire_halt()
103 writeb(0x2, 0x30000007); in wildfire_halt()
116 writeb(readb(MCFGPIO_PDDR_E) | (1 << 5), MCFGPIO_PDDR_E); in wildfiremod_halt()
119 writeb(readb(MCFGPIO_PODR_E) & ~(1 << 5), MCFGPIO_PODR_E); in wildfiremod_halt()
120 writeb(readb(MCFGPIO_PODR_E) | (1 << 5), MCFGPIO_PODR_E); in wildfiremod_halt()
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| A D | m527x.c | 57 writeb(0x1f, MCFGPIO_PAR_QSPI); in m527x_qspi_init()
81 writeb(par, MCFGPIO_PAR_FECI2C); in m527x_i2c_init()
117 writeb(v | 0xf0, MCFGPIO_PAR_FECI2C); in m527x_fec_init()
124 writeb(v | 0xc0, MCFGPIO_PAR_FEC0HL); in m527x_fec_init()
130 writeb(v | 0xc0, MCFGPIO_PAR_FEC1HL); in m527x_fec_init()
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| A D | m520x.c | 128 writeb(0x3f, MCF_GPIO_PAR_QSPI); in m520x_qspi_init()
147 writeb(par, MCF_GPIO_PAR_FECI2C); in m520x_i2c_init()
169 writeb(par2, MCF_GPIO_PAR_FECI2C); in m520x_uarts_init()
180 writeb(v | 0xf0, MCF_GPIO_PAR_FEC); in m520x_fec_init()
183 writeb(v | 0x0f, MCF_GPIO_PAR_FECI2C); in m520x_fec_init()
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| A D | m523x.c | 54 writeb(0x1f, MCFGPIO_PAR_QSPI); in m523x_qspi_init()
73 writeb(par, MCFGPIO_PAR_FECI2C); in m523x_i2c_init()
82 writeb(readb(MCFGPIO_PAR_FECI2C) | 0xf0, MCFGPIO_PAR_FECI2C); in m523x_fec_init()
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| A D | m53xx.c | 182 writeb(r, MCFGPIO_PAR_FECI2C); in m53xx_i2c_init()
204 writeb(v, MCFGPIO_PAR_FECI2C); in m53xx_fec_init()
208 writeb(v, MCFGPIO_PAR_FEC); in m53xx_fec_init()
335 writeb(0x3E, MCFGPIO_PAR_CS); in fbcs_init()
465 writeb(0x00, MCFGPIO_PAR_TIMER); in gpio_init()
466 writeb(0x08, MCFGPIO_PDDR_TIMER); in gpio_init()
467 writeb(0x00, MCFGPIO_PCLRR_TIMER); in gpio_init()
519 writeb(MCF_PLL_PODR_CPUDIV(BUSDIV/3) | MCF_PLL_PODR_BUSDIV(BUSDIV), in clock_pll()
522 writeb(mfd, MCF_PLL_PFDR); in clock_pll()
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| A D | m525x.c | 52 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, in m525x_qspi_init()
64 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m525x_i2c_init()
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| A D | m5249.c | 78 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, in m5249_qspi_init()
92 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m5249_i2c_init()
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| A D | timers.c | 57 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, in init_timer_irq()
63 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, in init_timer_irq()
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| /arch/mips/txx9/rbtx4927/ |
| A D | setup.c | 75 writeb(1, rbtx4927_pcireset_addr); in tx4927_pci_setup()
84 writeb(0, rbtx4927_pcireset_addr); in tx4927_pci_setup()
93 writeb(1, rbtx4927_pcireset_addr); in tx4927_pci_setup()
100 writeb(0, rbtx4927_pcireset_addr); in tx4927_pci_setup()
122 writeb(1, rbtx4927_pcireset_addr); in tx4937_pci_setup()
131 writeb(0, rbtx4927_pcireset_addr); in tx4937_pci_setup()
140 writeb(1, rbtx4927_pcireset_addr); in tx4937_pci_setup()
147 writeb(0, rbtx4927_pcireset_addr); in tx4937_pci_setup()
190 writeb(1, rbtx4927_softresetlock_addr); in toshiba_rbtx4927_restart()
197 writeb(1, rbtx4927_softreset_addr); in toshiba_rbtx4927_restart()
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| A D | irq.c | 136 writeb(v, rbtx4927_imask_addr); in toshiba_rbtx4927_irq_ioc_enable()
145 writeb(v, rbtx4927_imask_addr); in toshiba_rbtx4927_irq_ioc_disable()
161 writeb(0, rbtx4927_imask_addr); in toshiba_rbtx4927_irq_ioc_init()
163 writeb(0, rbtx4927_softint_addr); in toshiba_rbtx4927_irq_ioc_init()
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| /arch/nios2/boot/compressed/ |
| A D | console.c | 30 writeb(ch, uartbase + ALTERA_JTAGUART_DATA_REG); in jtag_putc()
38 writeb(ch, uartbase + ALTERA_JTAGUART_DATA_REG); in jtag_putc()
73 writeb(ch, uartbase + ALTERA_UART_TXDATA_REG); in uart_putc()
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| /arch/m68k/include/asm/ |
| A D | vga.h | 26 #undef writeb
33 #define writeb __raw_writeb macro
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| /arch/arm/mach-rpc/ |
| A D | irq.c | 131 writeb(val & ~mask, base + MASK); in iomd_irq_mask_ack()
132 writeb(mask, base + CLR); in iomd_irq_mask_ack()
141 writeb(val & ~mask, base + MASK); in iomd_irq_mask()
150 writeb(val | mask, base + MASK); in iomd_irq_unmask()
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| /arch/sparc/include/asm/ |
| A D | io_64.h | 156 #define writeb writeb macro
157 #define writeb_relaxed writeb
158 static inline void writeb(u8 b, volatile void __iomem *addr) in writeb() function
217 writeb(b, (volatile void __iomem *)addr); in outb()
357 writeb(c, d); in memset_io()
410 writeb(tmp, d); in memcpy_toio()
444 #define iowrite8 writeb
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| A D | io_32.h | 29 writeb(c, d); in _memset_io()
54 writeb(tmp, d); in _memcpy_toio()
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| /arch/csky/include/asm/ |
| A D | io.h | 25 #define writeb(v,c) ({ wmb(); writeb_relaxed((v),(c)); }) macro
29 #define writeb(v,c) ({ wmb(); writeb_relaxed((v),(c)); mb(); }) macro
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| /arch/arm/kernel/ |
| A D | io.c | 66 writeb(*f, to); in _memcpy_toio()
81 writeb(c, dst); in _memset_io()
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| /arch/mips/sgi-ip22/ |
| A D | ip22-time.c | 48 writeb(SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT, &sgint->tcword); in dosample()
55 writeb(SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL | SGINT_TCWORD_MSWST, in dosample()
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| /arch/arm/mach-footbridge/ |
| A D | ebsa285.c | 58 writeb(hw_led_state, xbus); in ebsa285_led_set()
82 writeb(hw_led_state, xbus); in ebsa285_leds_init()
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| /arch/mips/sibyte/swarm/ |
| A D | setup.c | 163 writeb(' ', reg); in setleds()
165 writeb(str[i], reg); in setleds()
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| /arch/alpha/include/asm/ |
| A D | io.h | 159 REMAP2(u8, writeb, volatile) in REMAP1()
245 extern void writeb(u8 b, volatile void __iomem *addr);
253 #define writeb writeb macro
450 IO_CONCAT(__IO_PREFIX,writeb)(b, addr); in __raw_writeb()
476 extern inline void writeb(u8 b, volatile void __iomem *addr) in writeb() function
592 #define writeb_relaxed writeb
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| /arch/mips/sgi-ip30/ |
| A D | ip30-console.c | 24 writeb(c, &uart->iu_thr); in prom_putchar()
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| /arch/mips/cobalt/ |
| A D | reset.c | 48 writeb(RESET, RESET_PORT); in cobalt_machine_restart()
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| /arch/x86/lib/ |
| A D | iomem.c | 84 writeb(in[i], &out[i]); in unrolled_memcpy_toio()
93 writeb(b, &mem[i]); in unrolled_memset_io()
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