Home
last modified time | relevance | path

Searched refs:A (Results 1 – 25 of 307) sorted by relevance

12345678910>>...13

/drivers/gpu/drm/ci/xfails/
A Di915-glk-skips.txt80 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
81 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
82 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
83 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
84 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
85 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
86 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
87 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
88 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
89 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
[all …]
A Damdgpu-stoney-flakes.txt1 # Board Name: hp-11A-G6-EE-grunt
8 # Board Name: hp-11A-G6-EE-grunt
15 # Board Name: hp-11A-G6-EE-grunt
22 # Board Name: hp-11A-G6-EE-grunt
29 # Board Name: hp-11A-G6-EE-grunt
/drivers/gpu/drm/i915/selftests/
A Di915_sw_fence.c105 A = alloc_fence(); in test_dag()
106 if (!A) in test_dag()
171 free_fence(A); in test_dag()
182 if (!A) in test_AB()
219 free_fence(A); in test_AB()
230 if (!A) in test_ABC()
299 free_fence(A); in test_ABC()
310 if (!A) in test_AB_C()
376 free_fence(A); in test_AB_C()
387 if (!A) in test_C_AB()
[all …]
/drivers/atm/
A Diphase.h74 #define IF_LOUD(A) IF_IADBG(IF_IADBG_LOUD) { A } argument
75 #define IF_ERR(A) IF_IADBG(IF_IADBG_ERR) { A } argument
84 #define IF_INTR(A) IF_IADBG( IF_IADBG_INTR ) { A } argument
88 #define IF_TX(A) IF_IADBG( IF_IADBG_TX ) { A } argument
89 #define IF_RX(A) IF_IADBG( IF_IADBG_RX ) { A } argument
90 #define IF_TXPKT(A) IF_IADBG( IF_IADBG_TXPKT ) { A } argument
91 #define IF_RXPKT(A) IF_IADBG( IF_IADBG_RXPKT ) { A } argument
94 #define IF_CBR(A) IF_IADBG( IF_IADBG_CBR ) { A } argument
95 #define IF_UBR(A) IF_IADBG( IF_IADBG_UBR ) { A } argument
96 #define IF_ABR(A) IF_IADBG( IF_IADBG_ABR ) { A } argument
[all …]
/drivers/gpu/drm/nouveau/include/nvhw/
A Ddrf.h66 #define NVVAL(A...) NVVAL_(X, ##A, NVVAL_I, NVVAL_N)(X, ##A) argument
71 #define NVDEF(A...) NVDEF_(X, ##A, NVDEF_I, NVDEF_N)(X, ##A) argument
130 #define DRF_RD(A...) DRF_RD_(X, ##A, DRF_RD_I, DRF_RD_N)(X, ##A) argument
137 #define DRF_WR(A...) DRF_WR_(X, ##A, DRF_WR_I, DRF_WR_N)(X, ##A) argument
148 #define DRF_MR(A...) DRF_MR_(X, ##A, DRF_MR_I, DRF_MR_N)(X, ##A) argument
155 #define DRF_RV(A...) DRF_RV_(X, ##A, DRF_RV_I, DRF_RV_N)(X, ##A) argument
163 #define DRF_WV(A...) DRF_WV_(X, ##A, DRF_WV_I, DRF_WV_N)(X, ##A) argument
171 #define DRF_WD(A...) DRF_WD_(X, ##A, DRF_WD_I, DRF_WD_N)(X, ##A) argument
181 #define DRF_MV(A...) DRF_MV_(X, ##A, DRF_MV_I, DRF_MV_N)(X, ##A) argument
191 #define DRF_MD(A...) DRF_MD_(X, ##A, DRF_MD_I, DRF_MD_N)(X, ##A) argument
[all …]
/drivers/gpu/drm/nouveau/
A Dnouveau_bo.h137 #define NVBO_RD32(A...) DRF_RD(NVBO_RD32_, ##A) argument
138 #define NVBO_RV32(A...) DRF_RV(NVBO_RD32_, ##A) argument
139 #define NVBO_TV32(A...) DRF_TV(NVBO_RD32_, ##A) argument
140 #define NVBO_TD32(A...) DRF_TD(NVBO_RD32_, ##A) argument
141 #define NVBO_WR32(A...) DRF_WR( NVBO_WR32_, ##A) argument
142 #define NVBO_WV32(A...) DRF_WV( NVBO_WR32_, ##A) argument
143 #define NVBO_WD32(A...) DRF_WD( NVBO_WR32_, ##A) argument
144 #define NVBO_MR32(A...) DRF_MR(NVBO_RD32_, NVBO_WR32_, u32, ##A) argument
145 #define NVBO_MV32(A...) DRF_MV(NVBO_RD32_, NVBO_WR32_, u32, ##A) argument
146 #define NVBO_MD32(A...) DRF_MD(NVBO_RD32_, NVBO_WR32_, u32, ##A) argument
/drivers/gpu/drm/nouveau/include/nvif/
A Dobject.h116 #define NVIF_RD32(p,A...) DRF_RD(NVIF_RD32_, (p), 0, ##A) argument
117 #define NVIF_RV32(p,A...) DRF_RV(NVIF_RD32_, (p), 0, ##A) argument
118 #define NVIF_TV32(p,A...) DRF_TV(NVIF_RD32_, (p), 0, ##A) argument
119 #define NVIF_TD32(p,A...) DRF_TD(NVIF_RD32_, (p), 0, ##A) argument
120 #define NVIF_WR32(p,A...) DRF_WR( NVIF_WR32_, (p), 0, ##A) argument
121 #define NVIF_WV32(p,A...) DRF_WV( NVIF_WR32_, (p), 0, ##A) argument
122 #define NVIF_WD32(p,A...) DRF_WD( NVIF_WR32_, (p), 0, ##A) argument
123 #define NVIF_MR32(p,A...) DRF_MR(NVIF_RD32_, NVIF_WR32_, u32, (p), 0, ##A) argument
124 #define NVIF_MV32(p,A...) DRF_MV(NVIF_RD32_, NVIF_WR32_, u32, (p), 0, ##A) argument
125 #define NVIF_MD32(p,A...) DRF_MD(NVIF_RD32_, NVIF_WR32_, u32, (p), 0, ##A) argument
A Dpush.h263 #define PUSH(A...) PUSH_(A, PUSH_10P, PUSH_10D, \ argument
272 PUSH_1P , PUSH_1D)(, ##A)
282 #define PUSH_NVSQ(A...) PUSH(MTHD, ##A) argument
283 #define PUSH_NV1I(A...) PUSH(1INC, ##A) argument
284 #define PUSH_NVNI(A...) PUSH(NINC, ##A) argument
354 #define PUSH_NV(A...) PUSH_NV_(A, PUSH_NV_10, PUSH_NV_10, \ argument
363 PUSH_NV_1 , PUSH_NV_1)(, ##A)
365 #define PUSH_IMMD(A...) PUSH_NV(NVIM, ##A) argument
366 #define PUSH_MTHD(A...) PUSH_NV(NVSQ, ##A) argument
367 #define PUSH_1INC(A...) PUSH_NV(NV1I, ##A) argument
[all …]
/drivers/pinctrl/sunxi/
A Dpinctrl-sun8i-h3.c23 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
29 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
35 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
41 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
47 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
52 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
58 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
63 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
68 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
73 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
[all …]
A Dpinctrl-sun50i-h5.c26 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
32 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
38 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
44 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
50 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
55 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
61 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
66 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
71 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
76 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
[all …]
A Dpinctrl-sun6i-a31.c24 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
32 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
40 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
48 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
56 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
64 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
72 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
80 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
88 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
95 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
[all …]
A Dpinctrl-sun5i.c24 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 0),
31 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 1),
38 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 2),
45 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 3),
52 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 4),
59 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 5),
66 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 6),
73 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 7),
80 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 8),
88 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 9),
[all …]
A Dpinctrl-sun9i-a80.c21 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
27 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
33 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
39 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
45 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
51 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
57 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
63 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
69 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
75 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
[all …]
A Dpinctrl-sun4i-a10.c25 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
34 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
43 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
52 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
61 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
69 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
77 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
85 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
93 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
101 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
[all …]
A Dpinctrl-sun50i-h616.c19 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
25 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
31 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
37 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
43 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
48 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
54 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
60 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
66 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
72 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
[all …]
A Dpinctrl-sun50i-h6.c16 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
18 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
20 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
22 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
24 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
26 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
28 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
30 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
32 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
34 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
/drivers/media/dvb-frontends/
A DKconfig36 A DVB-S/S2/DSS Multistandard demodulator. Say Y when you want
44 A Silicon tuner from ST used in conjunction with the STB0899
48 tristate "STV0900/STV0903(A/B) based"
65 tristate "STV6110/(A) based tuners"
69 A Silicon tuner that supports DVB-S and DVB-S2 modes
76 A Silicon tuner that supports DVB-S and DVB-S2 modes
114 A DVB-C/T demodulator.
177 A DVB-S/DSS Direct Conversion reveiver.
285 A DVB-S PLL chip.
845 A SEC controller chip from Intersil
[all …]
/drivers/tty/vt/
A Ducs_recompose_table.h_shipped22 … 0x0041, 0x0300, 0x00C0 }, /* LATIN CAPITAL LETTER A + COMBINING GRAVE ACCENT = LATIN CAPITAL LETT…
23 … 0x0041, 0x0301, 0x00C1 }, /* LATIN CAPITAL LETTER A + COMBINING ACUTE ACCENT = LATIN CAPITAL LETT…
24 …0041, 0x0302, 0x00C2 }, /* LATIN CAPITAL LETTER A + COMBINING CIRCUMFLEX ACCENT = LATIN CAPITAL LE…
25 …{ 0x0041, 0x0303, 0x00C3 }, /* LATIN CAPITAL LETTER A + COMBINING TILDE = LATIN CAPITAL LETTER A W…
26 …{ 0x0041, 0x0308, 0x00C4 }, /* LATIN CAPITAL LETTER A + COMBINING DIAERESIS = LATIN CAPITAL LETTER…
27 …{ 0x0041, 0x030A, 0x00C5 }, /* LATIN CAPITAL LETTER A + COMBINING RING ABOVE = LATIN CAPITAL LETTE…
48 …{ 0x0061, 0x0300, 0x00E0 }, /* LATIN SMALL LETTER A + COMBINING GRAVE ACCENT = LATIN SMALL LETTER
49 …{ 0x0061, 0x0301, 0x00E1 }, /* LATIN SMALL LETTER A + COMBINING ACUTE ACCENT = LATIN SMALL LETTER
51 …{ 0x0061, 0x0303, 0x00E3 }, /* LATIN SMALL LETTER A + COMBINING TILDE = LATIN SMALL LETTER A WITH …
52 …{ 0x0061, 0x0308, 0x00E4 }, /* LATIN SMALL LETTER A + COMBINING DIAERESIS = LATIN SMALL LETTER A W…
[all …]
A Ddefkeymap.map263 string F1 = "\033[[A"
291 compose '`' 'A' to '�'
293 compose '\'' 'A' to '�'
295 compose '^' 'A' to '�'
297 compose '~' 'A' to '�'
299 compose '"' 'A' to '�'
301 compose 'O' 'A' to '�'
303 compose '0' 'A' to '�'
305 compose 'A' 'A' to '�'
307 compose 'A' 'E' to '�'
/drivers/scsi/aic7xxx/
A Daic7xxx.seq128 mov A, ARG_1;
590 dec A;
799 add A, A, HADDR[0];
814 not A;
815 inc A;
1311 clr A;
2160 shl A, 5;
2173 shl A, 6;
2186 clr A;
2263 clr A;
[all …]
/drivers/gpu/drm/i915/gt/
A Dselftest_tlb.c234 struct drm_i915_gem_object *A, *B; in mem_tlbinv() local
250 A = create_fn(gt); in mem_tlbinv()
251 if (IS_ERR(A)) in mem_tlbinv()
252 return PTR_ERR(A); in mem_tlbinv()
254 vaddr = i915_gem_object_pin_map_unlocked(A, I915_MAP_WC); in mem_tlbinv()
272 GEM_BUG_ON(A->base.size != B->base.size); in mem_tlbinv()
273 if ((A->mm.page_sizes.phys | B->mm.page_sizes.phys) & (A->base.size - 1)) in mem_tlbinv()
275 A->base.size); in mem_tlbinv()
283 va = i915_vma_instance(A, &ppgtt->vm, NULL); in mem_tlbinv()
359 i915_gem_object_put(A); in mem_tlbinv()
/drivers/net/ethernet/intel/i40e/
A Di40e_debug.h39 #define hw_dbg(hw, S, A...) dev_dbg(i40e_hw_to_dev(hw), S, ##A) argument
40 #define hw_warn(hw, S, A...) dev_warn(i40e_hw_to_dev(hw), S, ##A) argument
/drivers/media/tuners/
A DKconfig84 A driver for the silicon tuner MAX2165 from Maxim.
105 A driver for the silicon IF tuner MT2060 from Microtune.
112 A driver for the silicon IF tuner MT2063 from Microtune.
126 A driver for the silicon baseband tuner MT2131 from Microtune.
133 A driver for the silicon baseband tuner MT2266 from Microtune.
147 A driver for the silicon tuner MXL5005S from MaxLinear.
154 A driver for the silicon tuner MxL5007T from MaxLinear.
175 A driver for the silicon tuner QT1010 from Quantek.
227 A silicon tuner module. Say Y when you want to support this tuner.
287 A driver for the silicon tuner XC4000 from Xceive.
[all …]
/drivers/net/wireless/marvell/libertas/
A DKconfig8 A library for Marvell Libertas 8xxx devices.
14 A driver for Marvell Libertas 8388 USB devices.
20 A driver for Marvell Libertas 8385/8686/8688 SDIO devices.
26 A driver for Marvell Libertas 8686 SPI devices.
/drivers/gpu/drm/amd/display/dc/gpio/
A Dhw_gpio.c46 REG_GET(A_reg, A, &gpio->store.a); in store_registers()
55 REG_UPDATE(A_reg, A, gpio->store.a); in restore_registers()
107 REG_UPDATE(A_reg, A, value); in dal_hw_gpio_set_value()
157 REG_UPDATE(A_reg, A, 0); in dal_hw_gpio_config_mode()
163 REG_UPDATE(A_reg, A, 0); in dal_hw_gpio_config_mode()

Completed in 765 milliseconds

12345678910>>...13