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Searched refs:ADDR_SURF_BANK_HEIGHT_1 (Results 1 – 25 of 31) sorted by relevance

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/drivers/gpu/drm/amd/amdgpu/
A Dgfx_v6_0.c506 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v6_0_tiling_mode_table_init()
533 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v6_0_tiling_mode_table_init()
540 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v6_0_tiling_mode_table_init()
551 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v6_0_tiling_mode_table_init()
559 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v6_0_tiling_mode_table_init()
700 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v6_0_tiling_mode_table_init()
748 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v6_0_tiling_mode_table_init()
780 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v6_0_tiling_mode_table_init()
788 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v6_0_tiling_mode_table_init()
797 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v6_0_tiling_mode_table_init()
[all …]
A Dgfx_v8_0.c2202 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v8_0_tiling_mode_table_init()
2206 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v8_0_tiling_mode_table_init()
2394 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v8_0_tiling_mode_table_init()
2398 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v8_0_tiling_mode_table_init()
2583 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v8_0_tiling_mode_table_init()
2587 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v8_0_tiling_mode_table_init()
2773 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v8_0_tiling_mode_table_init()
2778 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v8_0_tiling_mode_table_init()
2783 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v8_0_tiling_mode_table_init()
2808 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v8_0_tiling_mode_table_init()
[all …]
A Dgfx_v7_0.c1137 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()
1141 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()
1145 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()
1149 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()
1153 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()
1173 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()
1177 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()
1181 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()
1320 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()
1324 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()
[all …]
/drivers/gpu/drm/radeon/
A Dcik.c2588 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()
2592 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()
2596 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()
2600 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()
2604 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()
2620 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()
2624 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()
2628 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()
2632 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()
2813 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()
[all …]
A Dsi.c2556 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in si_tiling_mode_table_init()
2610 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in si_tiling_mode_table_init()
2646 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in si_tiling_mode_table_init()
2655 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in si_tiling_mode_table_init()
2691 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in si_tiling_mode_table_init()
2700 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in si_tiling_mode_table_init()
2771 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in si_tiling_mode_table_init()
2825 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in si_tiling_mode_table_init()
2861 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in si_tiling_mode_table_init()
2870 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in si_tiling_mode_table_init()
[all …]
A Dsid.h1212 # define ADDR_SURF_BANK_HEIGHT_1 0 macro
A Dcikd.h1266 # define ADDR_SURF_BANK_HEIGHT_1 0 macro
A Devergreend.h2223 # define ADDR_SURF_BANK_HEIGHT_1 0 macro
/drivers/gpu/drm/amd/include/asic_reg/bif/
A Dbif_5_1_enum.h964 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
A Dbif_5_0_enum.h1094 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/smu/
A Dsmu_8_0_enum.h964 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
A Dsmu_7_1_0_enum.h1123 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
A Dsmu_7_1_1_enum.h1124 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
A Dsmu_7_1_2_enum.h1142 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
A Dsmu_7_1_3_enum.h1178 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/gmc/
A Dgmc_8_2_enum.h964 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
A Dgmc_8_1_enum.h1094 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/dce/
A Ddce_8_0_enum.h1049 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
A Ddce_10_0_enum.h1669 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
A Ddce_11_0_enum.h5536 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/uvd/
A Duvd_6_0_enum.h977 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
A Duvd_5_0_enum.h1107 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/oss/
A Doss_2_4_enum.h1259 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
A Doss_3_0_1_enum.h1360 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator
A Doss_3_0_enum.h1393 ADDR_SURF_BANK_HEIGHT_1 = 0x0, enumerator

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