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Searched refs:ADDR_SURF_BANK_HEIGHT_8 (Results 1 – 25 of 30) sorted by relevance

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/drivers/gpu/drm/amd/include/asic_reg/bif/
A Dbif_5_1_enum.h967 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
A Dbif_5_0_enum.h1097 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
/drivers/gpu/drm/amd/include/asic_reg/smu/
A Dsmu_8_0_enum.h967 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
A Dsmu_7_1_0_enum.h1126 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
A Dsmu_7_1_1_enum.h1127 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
A Dsmu_7_1_2_enum.h1145 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
A Dsmu_7_1_3_enum.h1181 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
/drivers/gpu/drm/amd/include/asic_reg/gmc/
A Dgmc_8_2_enum.h967 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
A Dgmc_8_1_enum.h1097 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
/drivers/gpu/drm/amd/include/asic_reg/dce/
A Ddce_8_0_enum.h1052 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
A Ddce_10_0_enum.h1672 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
A Ddce_11_0_enum.h5539 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
/drivers/gpu/drm/amd/include/asic_reg/uvd/
A Duvd_6_0_enum.h980 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
A Duvd_5_0_enum.h1110 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
/drivers/gpu/drm/amd/include/asic_reg/oss/
A Doss_2_4_enum.h1262 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
A Doss_3_0_1_enum.h1363 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
A Doss_3_0_enum.h1396 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator
/drivers/gpu/drm/amd/amdgpu/
A Dgfx_v8_0.c2210 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in gfx_v8_0_tiling_mode_table_init()
2402 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in gfx_v8_0_tiling_mode_table_init()
2591 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in gfx_v8_0_tiling_mode_table_init()
2788 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in gfx_v8_0_tiling_mode_table_init()
2990 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in gfx_v8_0_tiling_mode_table_init()
3165 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in gfx_v8_0_tiling_mode_table_init()
3342 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in gfx_v8_0_tiling_mode_table_init()
A Dgfx_v6_0.c1124 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in gfx_v6_0_tiling_mode_table_init()
1222 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in gfx_v6_0_tiling_mode_table_init()
1238 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in gfx_v6_0_tiling_mode_table_init()
A Dgfx_v7_0.c1157 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in gfx_v7_0_tiling_mode_table_init()
1510 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in gfx_v7_0_tiling_mode_table_init()
/drivers/gpu/drm/radeon/
A Dsid.h1215 # define ADDR_SURF_BANK_HEIGHT_8 3 macro
A Dcikd.h1269 # define ADDR_SURF_BANK_HEIGHT_8 3 macro
A Devergreend.h2226 # define ADDR_SURF_BANK_HEIGHT_8 3 macro
A Dcik.c2608 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in cik_tiling_mode_table_init()
2833 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in cik_tiling_mode_table_init()
2976 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in cik_tiling_mode_table_init()
/drivers/gpu/drm/amd/include/asic_reg/gca/
A Dgfx_7_2_enum.h6209 ADDR_SURF_BANK_HEIGHT_8 = 0x3, enumerator

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