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Searched refs:AFMT_AUDIO_PACKET_CONTROL (Results 1 – 19 of 19) sorted by relevance

/drivers/gpu/drm/radeon/
A Devergreen_hdmi.c386 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + offset, in dce4_set_audio_packet()
421 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, in evergreen_hdmi_enable()
427 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, in evergreen_hdmi_enable()
431 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, in evergreen_hdmi_enable()
459 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, in evergreen_dp_enable()
485 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, in evergreen_dp_enable()
A Ddce3_1_afmt.c212 WREG32(AFMT_AUDIO_PACKET_CONTROL + offset, in dce3_2_set_audio_packet()
A Dr600.c3645 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0) & ~HDMI0_AZ_FORMAT_WTRIG_MASK; in r600_disable_interrupt_state()
3646 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, tmp); in r600_disable_interrupt_state()
3647 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1) & ~HDMI0_AZ_FORMAT_WTRIG_MASK; in r600_disable_interrupt_state()
3648 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, tmp); in r600_disable_interrupt_state()
3791 hdmi0 = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0) & ~AFMT_AZ_FORMAT_WTRIG_MASK; in r600_irq_set()
3887 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, hdmi0); in r600_irq_set()
3888 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, hdmi1); in r600_irq_set()
3999 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0); in r600_irq_ack()
4001 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, tmp); in r600_irq_ack()
4004 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1); in r600_irq_ack()
[all …]
A Drv770d.h851 #define AFMT_AUDIO_PACKET_CONTROL 0x7604 macro
A Devergreend.h709 #define AFMT_AUDIO_PACKET_CONTROL 0x712c macro
A Dr600d.h1231 #define AFMT_AUDIO_PACKET_CONTROL 0x7604 macro
A Devergreen.c4599 rdev, AFMT_AUDIO_PACKET_CONTROL + crtc_offsets[i], in evergreen_irq_set()
4655 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + crtc_offsets[i], in evergreen_irq_ack()
/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_afmt.c56 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in afmt3_setup_hdmi_audio()
156 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, !mute); in afmt3_audio_mute_control()
177 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in afmt3_setup_dp_audio()
A Ddcn30_afmt.h36 SRI(AFMT_AUDIO_PACKET_CONTROL, AFMT, id), \
47 uint32_t AFMT_AUDIO_PACKET_CONTROL; member
/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_afmt.h36 SRI(AFMT_AUDIO_PACKET_CONTROL, AFMT, id), \
47 uint32_t AFMT_AUDIO_PACKET_CONTROL; member
/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_stream_encoder.h61 SRI(AFMT_AUDIO_PACKET_CONTROL, DIG, id), \
176 SE_SF(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, mask_sh),\
203 SE_SF(AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, mask_sh),\
649 uint32_t AFMT_AUDIO_PACKET_CONTROL; member
A Ddce_stream_encoder.c1274 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in dce110_se_setup_hdmi_audio()
1360 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in dce110_se_setup_dp_audio()
1442 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, !mute); in dce110_se_audio_mute_control()
/drivers/gpu/drm/amd/display/dc/dio/dcn10/
A Ddcn10_stream_encoder.c1260 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in enc1_se_setup_hdmi_audio()
1350 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in enc1_se_setup_dp_audio()
1433 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, !mute); in enc1_se_audio_mute_control()
A Ddcn10_stream_encoder.h48 SRI(AFMT_AUDIO_PACKET_CONTROL, DIG, id), \
123 uint32_t AFMT_AUDIO_PACKET_CONTROL; member
/drivers/gpu/drm/amd/display/dc/resource/dcn35/
A Ddcn35_resource.h71 SRI_ARR(AFMT_AUDIO_PACKET_CONTROL, AFMT, id), \
/drivers/gpu/drm/amd/amdgpu/
A Ddce_v6_0.c1637 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_RESET_FIFO_WHEN_AUDIO_DIS, 1); in dce_v6_0_audio_set_packet()
1638 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in dce_v6_0_audio_set_packet()
1676 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, 1); in dce_v6_0_audio_hdmi_enable()
1687 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, 0); in dce_v6_0_audio_hdmi_enable()
1702 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, 1); in dce_v6_0_audio_dp_enable()
A Ddce_v10_0.c1667 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in dce_v10_0_afmt_setmode()
1736 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, 1); in dce_v10_0_afmt_setmode()
A Ddce_v11_0.c1716 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in dce_v11_0_afmt_setmode()
1785 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, 1); in dce_v11_0_afmt_setmode()
/drivers/gpu/drm/amd/display/dc/resource/dcn32/
A Ddcn32_resource.h252 SRI_ARR(AFMT_AUDIO_PACKET_CONTROL, AFMT, id), \

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