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Searched refs:ANALOGIX_DP_SYS_CTL_1 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/bridge/analogix/
A Danalogix_dp_reg.c145 writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_reset()
684 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_init_video()
720 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
721 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
723 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
A Danalogix_dp_reg.h69 #define ANALOGIX_DP_SYS_CTL_1 0x600 macro

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