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Searched refs:ANALOGIX_DP_SYS_CTL_4 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/bridge/analogix/
A Danalogix_dp_reg.c148 writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_reset()
618 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
620 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
622 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
624 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
751 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
753 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
768 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
770 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
A Danalogix_dp_reg.h72 #define ANALOGIX_DP_SYS_CTL_4 0x60C macro

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