Searched refs:APBC_PWM2 (Results 1 – 4 of 4) sorted by relevance
| /drivers/clk/mmp/ |
| A D | clk-pxa1908-apbc.c | 16 #define APBC_PWM2 0x14 macro
55 …{PXA1908_CLK_PWM2, "pwm2_clk", "pwm23_apb_share", CLK_SET_RATE_PARENT, APBC_PWM2, 0x2, 2, 0, 0, NU…
83 pxa_unit->base + APBC_PWM2, in pxa1908_apb_periph_clk_init()
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| A D | clk-of-pxa168.c | 27 #define APBC_PWM2 0x14 macro
168 …{0, "pwm2_mux", pwm_parent_names, ARRAY_SIZE(pwm_parent_names), CLK_SET_RATE_PARENT, APBC_PWM2, 4,…
189 …{PXA168_CLK_PWM2, "pwm2_clk", "pwm2_mux", CLK_SET_RATE_PARENT, APBC_PWM2, 0x3, 0x3, 0x0, 0, &pwm2_…
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| A D | clk-of-pxa910.c | 30 #define APBC_PWM2 0x14 macro
147 …{PXA910_CLK_PWM2, "pwm2_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM2, 0x3, 0x3, 0x0, 0, &reset_…
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| A D | clk-of-mmp2.c | 41 #define APBC_PWM2 0x44 macro
262 …{MMP2_CLK_PWM2, "pwm2_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM2, 0x7, 0x3, 0x0, 0, &reset_lo…
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