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Searched refs:BIT9 (Results 1 – 11 of 11) sorted by relevance

/drivers/staging/rtl8723bs/include/
A Drtl8723b_spec.h205 #define IMR_CPWM2_8723B BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */
234 #define IMR_TXFOVW_8723B BIT9 /* Transmit FIFO Overflow */
A Dosdep_service.h26 #define BIT9 0x00000200 macro
/drivers/net/wireless/realtek/rtlwifi/btcoexist/
A Dhalbt_precomp.h40 #define BIT9 0x00000200 macro
A Dhalbtcoutsrc.h101 #define ALGO_TRACE_SW_EXEC BIT9
A Dhalbtc8192e2ant.c2631 u16tmp |= BIT9; in btc8192e2ant_init_hwconfig()
/drivers/staging/rtl8723bs/hal/
A Dodm_RegDefine11N.h158 #define ODM_BIT_CCK_RPT_FORMAT_11N BIT9
A Dodm.h374 ODM_BB_RATE_ADAPTIVE = BIT9,
A Dodm_DIG.c22 …PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, 0x7); /* 0x890[9:8]=3 … in odm_NHMCounterStatisticsInit()
/drivers/scsi/
A Ddc395x.h67 #define BIT9 0x00000200 macro
/drivers/tty/
A Dsynclink_gt.c386 #define IRQ_RXIDLE BIT9 /* HDLC */
387 #define IRQ_RXBREAK BIT9 /* async */
4032 val |= BIT9; in async_mode()
4072 val |= BIT9; in async_mode()
4195 case HDLC_CRC_16_CCITT: val |= BIT9; break; in sync_mode()
4196 case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break; in sync_mode()
4268 case HDLC_CRC_16_CCITT: val |= BIT9; break; in sync_mode()
4269 case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break; in sync_mode()
4913 if (!(*(src+1) & (BIT9 + BIT8))) { in loopback_test_rx()
/drivers/scsi/lpfc/
A Dlpfc_hw4.h776 #define LPFC_SLI4_INTR9 BIT9

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