| /drivers/staging/rtl8723bs/hal/ |
| A D | rtl8723b_rf6052.c | 58 struct adapter *Adapter, enum channel_width Bandwidth in PHY_RF6052SetBandwidth8723B() argument
63 switch (Bandwidth) { in PHY_RF6052SetBandwidth8723B()
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| A D | odm_RegConfig8723B.c | 163 u8 *Bandwidth, in odm_ConfigBB_TXPWR_LMT_8723B() argument
173 Bandwidth, in odm_ConfigBB_TXPWR_LMT_8723B()
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| A D | odm_RegConfig8723B.h | 38 u8 *Bandwidth,
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| A D | hal_intf.c | 261 enum channel_width Bandwidth, u8 Offset40, u8 Offset80) in rtw_hal_set_chnl_bw() argument
263 PHY_SetSwChnlBWMode8723B(padapter, channel, Bandwidth, Offset40, Offset80); in rtw_hal_set_chnl_bw()
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| A D | hal_com_phycfg.c | 807 u8 *Bandwidth, in PHY_SetTxPowerLimit() argument
841 if (eqNByte(Bandwidth, (u8 *)("20M"), 3)) in PHY_SetTxPowerLimit()
843 else if (eqNByte(Bandwidth, (u8 *)("40M"), 3)) in PHY_SetTxPowerLimit()
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| A D | rtl8723b_phycfg.c | 772 enum channel_width Bandwidth, in PHY_SetSwChnlBWMode8723B() argument
777 …PHY_HandleSwChnlAndSetBW8723B(Adapter, true, true, channel, Bandwidth, Offset40, Offset80, channel… in PHY_SetSwChnlBWMode8723B()
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| /drivers/staging/rtl8723bs/include/ |
| A D | hal_com_phycfg.h | 94 enum channel_width Bandwidth, u8 RfPath, u8 DataRate,
97 void PHY_SetTxPowerLimit(struct adapter *Adapter, u8 *Regulation, u8 *Bandwidth,
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| A D | rtl8723b_rf.h | 15 enum channel_width Bandwidth);
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| A D | hal_phy_cfg.h | 58 enum channel_width Bandwidth,
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| A D | hal_intf.h | 244 void rtw_hal_set_chnl_bw(struct adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Off…
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| /drivers/perf/amlogic/ |
| A D | Kconfig | 3 tristate "Amlogic DDR Bandwidth Performance Monitor"
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| /drivers/mux/ |
| A D | Kconfig | 16 ADG792A and ADG792G Wide Bandwidth Triple 4:1 Multiplexers
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| /drivers/gpu/drm/display/ |
| A D | Kconfig | 53 DP tunnel features like the Bandwidth Allocation mode to maximize the
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| /drivers/media/dvb-frontends/ |
| A D | stv0900_priv.h | 391 u32 Bandwidth, int demod);
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| A D | stv0900_core.c | 573 u32 Bandwidth, int demod) in stv0900_set_tuner_auto() argument
585 stv0900_write_bits(intp, TUN_BW, Bandwidth / 2000000); in stv0900_set_tuner_auto()
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| A D | stv0367.c | 529 static int stv0367_iir_filt_init(struct stv0367_state *state, u8 Bandwidth, in stv0367_iir_filt_init() argument
536 switch (Bandwidth) { in stv0367_iir_filt_init()
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| /drivers/soc/qcom/ |
| A D | Kconfig | 271 tristate "QCOM Interconnect Bandwidth Monitor driver"
303 Most Qualcomm SoCs feature a number of Universal Bandwidth Compression
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| /drivers/gpu/drm/xe/ |
| A D | Kconfig | 73 Choose this option to detect DP tunnels and enable the Bandwidth
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| /drivers/gpu/drm/i915/ |
| A D | Kconfig | 165 Choose this option to detect DP tunnels and enable the Bandwidth
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| /drivers/media/tuners/ |
| A D | mxl5005s.c | 1674 u32 Bandwidth, /* filter channel bandwidth (6, 7, 8) */ in MXL5005_TunerConfig() argument
1698 state->Chan_Bandwidth = Bandwidth; in MXL5005_TunerConfig()
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