Home
last modified time | relevance | path

Searched refs:C10_PLL0_FRACEN (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_snps_hdmi_pll.c338 REG_FIELD_PREP(C10_PLL0_FRACEN, pll_params.fracn_en) | in intel_snps_hdmi_pll_compute_c10pll()
A Dintel_cx0_phy_regs.h233 #define C10_PLL0_FRACEN REG_BIT8(4) macro
A Dintel_cx0_phy.c2170 fracen = hw_state->pll[0] & C10_PLL0_FRACEN; in intel_c10pll_dump_hw_state()
2734 if (pll_state->pll[0] & C10_PLL0_FRACEN) { in intel_c10pll_calc_port_clock()

Completed in 15 milliseconds