Home
last modified time | relevance | path

Searched refs:CGTS_SM_CTRL_REG (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/radeon/
A Dtrinityd.h224 #define CGTS_SM_CTRL_REG 0x9150 macro
A Dni.c1140 cgts_sm_ctrl_reg = RREG32(CGTS_SM_CTRL_REG); in cayman_gpu_init()
1142 WREG32(CGTS_SM_CTRL_REG, OVERRIDE); in cayman_gpu_init()
1143 WREG32(CGTS_SM_CTRL_REG, cgts_sm_ctrl_reg); in cayman_gpu_init()
A Drv770d.h310 #define CGTS_SM_CTRL_REG 0x9150 macro
A Dtrinity_dpm.c369 WREG32(CGTS_SM_CTRL_REG, CGTS_SM_CTRL_REG_ENABLE); in trinity_mg_clockgating_enable()
371 WREG32(CGTS_SM_CTRL_REG, CGTS_SM_CTRL_REG_DISABLE); in trinity_mg_clockgating_enable()
A Dnid.h419 #define CGTS_SM_CTRL_REG 0x9150 macro
A Dcypress_dpm.c194 WREG32(CGTS_SM_CTRL_REG, cgts_sm_ctrl_reg); in cypress_mg_clock_gating_enable()
215 WREG32(CGTS_SM_CTRL_REG, 0x81f44bc0); in cypress_mg_clock_gating_enable()
A Dsid.h1141 #define CGTS_SM_CTRL_REG 0x9150 macro
A Dcikd.h1653 #define CGTS_SM_CTRL_REG 0x3c000 macro
A Dsi.c5381 orig = data = RREG32(CGTS_SM_CTRL_REG); in si_enable_mgcg()
5384 WREG32(CGTS_SM_CTRL_REG, data); in si_enable_mgcg()
5416 orig = data = RREG32(CGTS_SM_CTRL_REG); in si_enable_mgcg()
5419 WREG32(CGTS_SM_CTRL_REG, data); in si_enable_mgcg()
A Devergreend.h340 #define CGTS_SM_CTRL_REG 0x9150 macro
A Dcik.c6057 orig = data = RREG32(CGTS_SM_CTRL_REG); in cik_enable_mgcg()
6069 WREG32(CGTS_SM_CTRL_REG, data); in cik_enable_mgcg()
6089 orig = data = RREG32(CGTS_SM_CTRL_REG); in cik_enable_mgcg()
6092 WREG32(CGTS_SM_CTRL_REG, data); in cik_enable_mgcg()
A Drv770_dpm.c161 WREG32(CGTS_SM_CTRL_REG, RV770_MGCGCGTSSMCTRL_DFLT); in rv770_mg_clock_gating_enable()

Completed in 107 milliseconds