Searched refs:CGU_CLK_MUX (Results 1 – 10 of 10) sorted by relevance
| /drivers/clk/ingenic/ |
| A D | jz4780-cgu.c | 329 "sclk_a", CGU_CLK_MUX,
336 "cpumux", CGU_CLK_MUX,
365 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
373 "ahb2_apb_mux", CGU_CLK_MUX,
392 "ddr", CGU_CLK_MUX | CGU_CLK_DIV,
413 "i2s_pll", CGU_CLK_MUX | CGU_CLK_DIV,
420 "i2s", CGU_CLK_MUX,
442 "msc_mux", CGU_CLK_MUX,
478 "ssi_pll", CGU_CLK_MUX | CGU_CLK_DIV,
485 "ssi", CGU_CLK_MUX,
[all …]
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| A D | jz4770-cgu.c | 230 "cim", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
237 "uhc", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
244 "gpu", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
251 "bch", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
258 "lpclk", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
265 "gps", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
275 "ssi_mux", CGU_CLK_DIV | CGU_CLK_MUX,
282 "pcm_mux", CGU_CLK_DIV | CGU_CLK_MUX,
289 "i2s", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
297 "usb", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
[all …]
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| A D | x1000-cgu.c | 274 "sclk_a", CGU_CLK_MUX,
280 "cpu_mux", CGU_CLK_MUX,
309 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
316 "ahb2_apb_mux", CGU_CLK_MUX,
335 "ddr", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
356 "i2s_pll_mux", CGU_CLK_MUX,
377 "i2s", CGU_CLK_MUX,
395 "msc_mux", CGU_CLK_MUX,
423 "ssi_pll", CGU_CLK_MUX | CGU_CLK_DIV,
436 "ssi_mux", CGU_CLK_MUX,
[all …]
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| A D | jz4760-cgu.c | 215 "uhc", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
222 "gpu", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
229 "lpclk_div", CGU_CLK_DIV | CGU_CLK_MUX,
235 "tve", CGU_CLK_GATE | CGU_CLK_MUX,
241 "lpclk", CGU_CLK_GATE | CGU_CLK_MUX,
247 "gps", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
257 "pcm", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
265 "i2s", CGU_CLK_DIV | CGU_CLK_MUX,
282 "mmc_mux", CGU_CLK_MUX | CGU_CLK_DIV,
288 "ssi_mux", CGU_CLK_DIV | CGU_CLK_MUX,
[all …]
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| A D | x1830-cgu.c | 215 "sclk_a", CGU_CLK_MUX,
221 "cpu_mux", CGU_CLK_MUX,
246 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
253 "ahb2_apb_mux", CGU_CLK_MUX,
272 "ddr", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
285 "mac", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
294 "lcd", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
303 "msc_mux", CGU_CLK_MUX,
324 "ssi_pll", CGU_CLK_MUX | CGU_CLK_DIV,
338 "ssi_mux", CGU_CLK_MUX,
[all …]
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| A D | jz4725b-cgu.c | 152 "i2s", CGU_CLK_MUX | CGU_CLK_DIV,
159 "spi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
173 "udc", CGU_CLK_MUX | CGU_CLK_DIV,
244 "rtc", CGU_CLK_MUX,
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| A D | jz4755-cgu.c | 140 "udc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
161 "i2s", CGU_CLK_MUX | CGU_CLK_DIV,
175 "tve", CGU_CLK_MUX | CGU_CLK_GATE,
182 "rtc", CGU_CLK_MUX | CGU_CLK_GATE,
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| A D | jz4740-cgu.c | 166 "i2s", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
174 "spi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
196 "udc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
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| A D | cgu.c | 340 if (clk_info->type & CGU_CLK_MUX) { in ingenic_clk_get_parent()
367 if (clk_info->type & CGU_CLK_MUX) { in ingenic_clk_set_parent()
700 if (caps & (CGU_CLK_MUX | CGU_CLK_CUSTOM)) { in ingenic_register_clock()
703 if (caps & CGU_CLK_MUX) in ingenic_register_clock()
754 if (caps & CGU_CLK_MUX) { in ingenic_register_clock()
758 caps &= ~(CGU_CLK_MUX | CGU_CLK_MUX_GLITCHFREE); in ingenic_register_clock()
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| A D | cgu.h | 165 CGU_CLK_MUX = BIT(3), enumerator
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