| /drivers/gpu/drm/sprd/ |
| A D | megacores_pll.c | 17 #define CLK 0 macro
131 regmap_write(regmap, 0x31, val[CLK]); in dphy_set_timing_reg()
137 regmap_write(regmap, 0x90, val[CLK]); in dphy_set_timing_reg()
144 regmap_write(regmap, 0x32, val[CLK]); in dphy_set_timing_reg()
150 regmap_write(regmap, 0x91, val[CLK]); in dphy_set_timing_reg()
157 regmap_write(regmap, 0x33, val[CLK]); in dphy_set_timing_reg()
163 regmap_write(regmap, 0x92, val[CLK]); in dphy_set_timing_reg()
170 regmap_write(regmap, 0x34, val[CLK]); in dphy_set_timing_reg()
239 val[DATA] = val[CLK]; in dphy_timing_config()
276 val[DATA] = val[CLK]; in dphy_timing_config()
[all …]
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| /drivers/gpu/drm/amd/display/dc/gpio/ |
| A D | ddc_regs.h | 158 DDC_REG_LIST(CLK, id)\
168 DDC_VGA_REG_LIST(CLK)\
187 DDC_REG_LIST_DCN2(CLK, id)\
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| /drivers/pinctrl/ |
| A D | pinctrl-th1520.c | 182 TH1520_PAD(16, AOGPIO_7, CLK, AUD, ____, GPIO, ____, ____, 0),
185 TH1520_PAD(19, AOGPIO_10, CLK, AUD, ____, GPIO, ____, ____, 0),
265 TH1520_PAD(49, CLK_OUT_0, BSEL, CLK, ____, GPIO, ____, ____, 0),
266 TH1520_PAD(50, CLK_OUT_1, BSEL, CLK, ____, GPIO, ____, ____, 0),
267 TH1520_PAD(51, CLK_OUT_2, BSEL, CLK, ____, GPIO, ____, ____, 0),
268 TH1520_PAD(52, CLK_OUT_3, BSEL, CLK, ____, GPIO, ____, ____, 0),
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| /drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
| A D | hw_factory_dcn20.c | 128 DDC_GPIO_VGA_REG_LIST(CLK),
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| /drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
| A D | hw_factory_dcn30.c | 135 DDC_GPIO_VGA_REG_LIST(CLK),
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| /drivers/gpu/drm/amd/display/dc/gpio/dcn315/ |
| A D | hw_factory_dcn315.c | 129 DDC_GPIO_VGA_REG_LIST(CLK),
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| /drivers/gpu/drm/amd/display/dc/gpio/dcn32/ |
| A D | hw_factory_dcn32.c | 139 DDC_GPIO_VGA_REG_LIST(CLK),
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| /drivers/gpu/drm/amd/display/dc/gpio/dcn401/ |
| A D | hw_factory_dcn401.c | 131 DDC_GPIO_VGA_REG_LIST(CLK),
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| /drivers/clk/ti/ |
| A D | clock.h | 87 #define CLK(dev, con, ck) \ macro
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| /drivers/net/ethernet/cadence/ |
| A D | macb_main.c | 2689 config = GEM_BF(CLK, GEM_CLK_DIV8); in gem_mdc_clk_div()
2691 config = GEM_BF(CLK, GEM_CLK_DIV16); in gem_mdc_clk_div()
2693 config = GEM_BF(CLK, GEM_CLK_DIV32); in gem_mdc_clk_div()
2695 config = GEM_BF(CLK, GEM_CLK_DIV48); in gem_mdc_clk_div()
2697 config = GEM_BF(CLK, GEM_CLK_DIV64); in gem_mdc_clk_div()
2699 config = GEM_BF(CLK, GEM_CLK_DIV96); in gem_mdc_clk_div()
2701 config = GEM_BF(CLK, GEM_CLK_DIV128); in gem_mdc_clk_div()
2703 config = GEM_BF(CLK, GEM_CLK_DIV224); in gem_mdc_clk_div()
2718 config = MACB_BF(CLK, MACB_CLK_DIV8); in macb_mdc_clk_div()
2720 config = MACB_BF(CLK, MACB_CLK_DIV16); in macb_mdc_clk_div()
[all …]
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| /drivers/media/dvb-frontends/ |
| A D | bcm3510_priv.h | 138 u8 CLK :1; member
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| /drivers/video/fbdev/via/ |
| A D | hw.h | 630 void viafb_set_vclock(u32 CLK, int set_iga);
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| /drivers/pinctrl/tegra/ |
| A D | pinctrl-tegra210.c | 1439 …PINGROUP(clk_32k_in, CLK, RSVD1, RSVD2, RSVD3, 0x3160, N, N, N, Y,…
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| A D | pinctrl-tegra114.c | 1748 …PINGROUP(clk_32k_in, CLK, RSVD2, RSVD3, RSVD4, 0x3330, N, N…
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| A D | pinctrl-tegra124.c | 1945 …PINGROUP(clk_32k_in, CLK, RSVD2, RSVD3, RSVD4, 0x3330, N, N…
|