Searched refs:CLK_CFG_2 (Results 1 – 2 of 2) sorted by relevance
| /drivers/clk/mediatek/ |
| A D | clk-mt6735-topckgen.c | 20 #define CLK_CFG_2 0x60 macro
343 …MUX_GATE_CLR_SET_UPD(CLK_TOP_UART_SEL, "uart_sel", uart_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, CLK…
344 …MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, CLK_CF…
345 …MUX_GATE_CLR_SET_UPD(CLK_TOP_USB20_SEL, "usb20_sel", usb20_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, …
346 …MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC50_0_SEL, "msdc50_0_sel", msdc50_0_sel_parents, CLK_CFG_2, CLK_CF…
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| A D | clk-mt6765.c | 47 #define CLK_CFG_2 0x60 macro
397 camtg_parents, CLK_CFG_2, CLK_CFG_2_SET,
400 CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR,
403 CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 16, 1, 23,
405 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, CLK_CFG_2,
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Completed in 9 milliseconds